From c1212b2f5c5ed440bf8e9ebc8e4fd7488858b935 Mon Sep 17 00:00:00 2001
From: Stelian Pop <stelian@popies.net>
Date: Thu, 8 May 2008 20:52:18 +0200
Subject: [PATCH] AT91SAM9260EK: Handle 8 or 16 bit NAND
The Atmel boards can handle 8 or 16 bit NAND memories. This patch
makes the support configurable in the board config header file
(CFG_NAND_DBW_8 or CFG_NAND_DBW_16).
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
board/atmel/at91sam9260ek/at91sam9260ek.c | 7 ++++++-
board/atmel/at91sam9260ek/nand.c | 3 +++
include/configs/at91sam9260ek.h | 1 +
3 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/board/atmel/at91sam9260ek/at91sam9260ek.c b/board/atmel/at91sam9260ek/at91sam9260ek.c
index 21479acab4b..4635f0fb7c4 100644
--- a/board/atmel/at91sam9260ek/at91sam9260ek.c
+++ b/board/atmel/at91sam9260ek/at91sam9260ek.c
@@ -90,7 +90,12 @@ static void at91sam9260ek_nand_hw_init(void)
at91_sys_write(AT91_SMC_MODE(3),
AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
AT91_SMC_EXNWMODE_DISABLE |
- AT91_SMC_DBW_8 | AT91_SMC_TDF_(2));
+#ifdef CFG_NAND_DBW_16
+ AT91_SMC_DBW_16 |
+#else /* CFG_NAND_DBW_8 */
+ AT91_SMC_DBW_8 |
+#endif
+ AT91_SMC_TDF_(2));
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC);
diff --git a/board/atmel/at91sam9260ek/nand.c b/board/atmel/at91sam9260ek/nand.c
index 7c1e6abd9a3..9738f0fd48a 100644
--- a/board/atmel/at91sam9260ek/nand.c
+++ b/board/atmel/at91sam9260ek/nand.c
@@ -68,6 +68,9 @@ static int at91sam9260ek_nand_ready(struct mtd_info *mtd)
int board_nand_init(struct nand_chip *nand)
{
nand->eccmode = NAND_ECC_SOFT;
+#ifdef CFG_NAND_DBW_16
+ nand->options = NAND_BUSWIDTH_16;
+#endif
nand->hwcontrol = at91sam9260ek_nand_hwcontrol;
nand->dev_ready = at91sam9260ek_nand_ready;
nand->chip_delay = 20;
diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h
index 41c418f9aba..784b9e5e634 100644
--- a/include/configs/at91sam9260ek.h
+++ b/include/configs/at91sam9260ek.h
@@ -104,6 +104,7 @@
#define NAND_MAX_CHIPS 1
#define CFG_MAX_NAND_DEVICE 1
#define CFG_NAND_BASE 0x40000000
+#define CFG_NAND_DBW_8 1
/* NOR flash - no real flash on this board */
#define CFG_NO_FLASH 1
--
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