From 09ed3071b943f87da2c603fabd7fc150d25c896d Mon Sep 17 00:00:00 2001
From: Lionel Debieve <lionel.debieve@st.com>
Date: Sun, 28 Jun 2020 11:30:01 +0200
Subject: [PATCH] clk: stm32mp1_calib: fix the limit calibration value
Calibration uses the ARM counter which is 32 bit signed value.
Depending on the clock source, some required timing value cannot
be reached and must be limited to the INT32 max value.
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: If499d33b42c6abebd40b3d7947aa6f709fdeab8e
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/171274
Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>
Reviewed-by: CIBUILD <smet-aci-builds@lists.codex.cro.st.com>
Reviewed-by: Etienne CARRIERE <etienne.carriere@st.com>
---
drivers/st/clk/stm32mp1_calib.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/st/clk/stm32mp1_calib.c b/drivers/st/clk/stm32mp1_calib.c
index b764c971c..8a8993885 100644
--- a/drivers/st/clk/stm32mp1_calib.c
+++ b/drivers/st/clk/stm32mp1_calib.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2019, STMicroelectronics - All Rights Reserved
+ * Copyright (C) 2019-2020, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -517,8 +517,14 @@ void stm32mp1_calib_init(void)
timer_val = fdt_rcc_read_uint32_default("st,cal-sec", 0) *
plat_get_syscnt_freq2();
+ if (timer_val > INT32_MAX) {
+ timer_val = INT32_MAX;
+ }
+
if (timer_val != 0U) {
/* Load & enable timer */
+ INFO("Set calibration timer to %u sec\n",
+ timer_val / plat_get_syscnt_freq2());
write_cntp_tval(timer_val);
write_cntp_ctl(BIT(0));
};
--
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