From 923c221b6d94c16678abca04ab76b633b052b585 Mon Sep 17 00:00:00 2001 From: anzhou <anzhou@nvidia.com> Date: Fri, 26 Jun 2020 15:21:10 +0800 Subject: [PATCH] Tegra: fixup CNTPS_TVAL_EL1 delay timer reads The delay_timer driver for Tegra uses the CNTPS_TVAL_EL1 secure, physical, decrementing timer as the source. The current logic incorrectly marks this as an incrementing timer, by negating the timer value. This patch fixes the anomaly and updates the driver to remove this logic. Signed-off-by: anzhou <anzhou@nvidia.com> Change-Id: I60490bdcaf0b66bf4553a6de3f4e4e32109017f4 --- plat/nvidia/tegra/common/tegra_delay_timer.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/plat/nvidia/tegra/common/tegra_delay_timer.c b/plat/nvidia/tegra/common/tegra_delay_timer.c index cfd9a15e3..d9547c4a3 100644 --- a/plat/nvidia/tegra/common/tegra_delay_timer.c +++ b/plat/nvidia/tegra/common/tegra_delay_timer.c @@ -22,11 +22,9 @@ static uint32_t tegra_timer_get_value(void) /* * Generic delay timer implementation expects the timer to be a down - * counter. We apply bitwise NOT operator to the tick values returned - * by read_cntps_tval_el1() to simulate the down counter. The value is - * clipped from 64 to 32 bits. + * counter. The value is clipped from 64 to 32 bits. */ - return (uint32_t)(~read_cntps_tval_el1()); + return (uint32_t)(read_cntps_tval_el1()); } /* -- GitLab