From add7ea31f02e458ca8f5fce31f0d12a3224b8d34 Mon Sep 17 00:00:00 2001
From: Gabriel Fernandez <gabriel.fernandez@st.com>
Date: Fri, 28 Feb 2020 11:22:48 +0100
Subject: [PATCH] stm32mp1: scmi: introduce clock rate description by step
All clocks are exposed as single rate clocks.
Concerning MPU clock, only CPU OPP can act and only valid rates
are expected for this very clock.
Change-Id: I2f76135996da23dae590aa9d77e3bfd6c03a68c1
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/185717
Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: CIBUILD <smet-aci-builds@lists.codex.cro.st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>
Tested-by: Yann GAUTIER <yann.gautier@st.com>
---
plat/st/stm32mp1/stm32mp1_scmi.c | 33 ++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/plat/st/stm32mp1/stm32mp1_scmi.c b/plat/st/stm32mp1/stm32mp1_scmi.c
index c63e8e9c5..8e9f4a4d5 100644
--- a/plat/st/stm32mp1/stm32mp1_scmi.c
+++ b/plat/st/stm32mp1/stm32mp1_scmi.c
@@ -285,6 +285,39 @@ int32_t plat_scmi_clock_rates_array(unsigned int agent_id, unsigned int scmi_id,
return SCMI_SUCCESS;
}
+int32_t plat_scmi_clock_rates_by_step(unsigned int agent_id,
+ unsigned int scmi_id,
+ unsigned long *array)
+{
+ struct stm32_scmi_clk *clock = find_clock(agent_id, scmi_id);
+
+ if (clock == NULL) {
+ return SCMI_NOT_FOUND;
+ }
+
+ if (!stm32mp_nsec_can_access_clock(clock->clock_id)) {
+ return SCMI_DENIED;
+ }
+
+ switch (scmi_id) {
+ case CK_SCMI0_MPU:
+ /*
+ * Pretend we support all rates for MPU clock,
+ * CLOCK_RATE_SET will reject unsupported rates.
+ */
+ array[0] = 0U;
+ array[1] = UINT32_MAX;
+ array[2] = 1U;
+ break;
+ default:
+ array[0] = clk_get_rate(clock->clock_id);
+ array[1] = array[0];
+ array[2] = 0U;
+ break;
+ }
+ return SCMI_SUCCESS;
+}
+
unsigned long plat_scmi_clock_get_rate(unsigned int agent_id,
unsigned int scmi_id)
{
--
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