From c3416934096d3a23589e39c86f571424d9c3e8bc Mon Sep 17 00:00:00 2001
From: Lionel Debieve <lionel.debieve@st.com>
Date: Tue, 17 Nov 2020 01:18:37 +0100
Subject: [PATCH] stm32mp: dt: fix issue when configuring the tzc400 region

TZC400 configuration is applied at the end of BL2 after MMU and data
cache being turned off. Configuration needs to retrieve the DDR size
to generate the correct region.
Access to the size fails because the value is still in
the data cache. Flushing the size is mandatory.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: Ib92c4c29f856638d479bb0600cebe2bb7de15312
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/184733
Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>
Reviewed-by: CIBUILD <smet-aci-builds@lists.codex.cro.st.com>
---
 plat/st/common/stm32mp_dt.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/plat/st/common/stm32mp_dt.c b/plat/st/common/stm32mp_dt.c
index b403caeb1..f139ed92a 100644
--- a/plat/st/common/stm32mp_dt.c
+++ b/plat/st/common/stm32mp_dt.c
@@ -282,6 +282,8 @@ uint32_t dt_get_ddr_size(void)
 
 	size = fdt_read_uint32_default(fdt, node, "st,mem-size", 0U);
 
+	flush_dcache_range((uintptr_t)&size, sizeof(uint32_t));
+
 	return size;
 }
 
-- 
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