From 2f3428b5cf9ba4255d8729fd249cbfb8a540d33e Mon Sep 17 00:00:00 2001 From: Joonyoung Shim <jy0922.shim@samsung.com> Date: Fri, 26 Sep 2014 19:43:54 +0900 Subject: [PATCH] ARM: EXYNOS: Fix UART address selection for DEBUG_LL The Exynos542x SoCs using A15+A7 can boot to A15 or A7. If it boots using A7 (like on Odroid XU family boards), it can't choose right UART physical address only the part number of CP15. Fix the detection logic by checking the Cluster ID additionally. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> [k.kozlowski: Extend commit message] Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> --- arch/arm/include/debug/exynos.S | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/debug/exynos.S b/arch/arm/include/debug/exynos.S index b17fdb7fbd347..60bf3c23200d6 100644 --- a/arch/arm/include/debug/exynos.S +++ b/arch/arm/include/debug/exynos.S @@ -24,7 +24,11 @@ mrc p15, 0, \tmp, c0, c0, 0 and \tmp, \tmp, #0xf0 teq \tmp, #0xf0 @@ A15 - ldreq \rp, =EXYNOS5_PA_UART + beq 100f + mrc p15, 0, \tmp, c0, c0, 5 + and \tmp, \tmp, #0xf00 + teq \tmp, #0x100 @@ A15 + A7 but boot to A7 +100: ldreq \rp, =EXYNOS5_PA_UART movne \rp, #EXYNOS4_PA_UART @@ EXYNOS4 ldr \rv, =S3C_VA_UART #if CONFIG_DEBUG_S3C_UART != 0 -- GitLab