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Input: goodix - fix spurious key release events

See merge request !18

Dmitry Mastykin authored Mar 24, 2020 and Maximilian Adducchio committed Feb 02, 2022

The goodix panel sends spurious interrupts after a 'finger up' event,
which always cause a timeout.
We were exiting the interrupt handler by reporting touch_num == 0, but
this was still processed as valid and caused the code to use the
uninitialised point_data, creating spurious key release events.

Report an error from the interrupt handler so as to avoid processing
invalid point_data further.
Signed-off-by: Dmitry Mastykin <dmastykin@astralinux.ru>
Reviewed-by: Bastien Nocera <hadess@hadess.net>
Link: https://lore.kernel.org/r/20200316075302.3759-2-dmastykin@astralinux.ru

Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>

mtd: nand: bbt: Fix corner case in bad block table handling

See merge request !14

mtd: spinand: winbond: Add support for W25N02KV

See merge request linux/linux!6

W25N02KV is the successor chip of W25M02GV with on Chip 8-Bit ECC.
Datasheet: https://www.winbond.com/resource-files/W25N02KVxxIRU_Datasheet_20210520_F.pdf

Winbond chips actually have Device IDs with a length of 2 byte. We need
to use the full device ID (as set with SPINAND_INFO) to get a
correct match.

The SoC devicetree sets the temperature thresholds for the low
temperature grading (consumer). We always use the high grading
(industrial) and need to raise the values accordingly.

In the long run the driver should be able to detect the grading
and adjust the thresholds by itself.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>

* add multiplexing for otg1_id pin (usb_otg1). Otherwise 'host' usb role is not detected.
* add multiplexing for otg1_oc pin

Lucas Stach authored May 04, 2021 and Frieder Schrempf committed May 04, 2021

DMA addressing capabilities on i.MX8MN are limited by the interconnect,
same as on i.MX8MQ. Add dma-ranges to the the peripheral bus to let
the kernel know about this.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

Lucas Stach authored May 04, 2021 and Frieder Schrempf committed May 04, 2021

DMA addressing capabilities on i.MX8MM are limited by the interconnect,
same as on i.MX8MQ. Add dma-ranges to the the peripheral bus to let
the kernel know about this.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

This fixes a warning:

Warning (graph_endpoint): /soc@0/bus@30800000/i2c@30a40000/lvds@2c/port@0/endpoint: graph connection to node '/soc@0/bus@32c00000/mipi_dsi@32e10000/port@1/endpoint' is not bidirectional
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>

This reverts commit fcd89325.

The driver supports only a single port so this doesn't make sense at all.

All the memory-related config should be on the SoM or board level.
For the CMA, there are boards with 1GB RAM and no graphics and for
such cases 640 MiB of CMA is way too much.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>

This is a backport of the driver from Linux v5.10.25 to Linux 5.4.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>

This reverts commit 5449c343

.

There's probably a bug in the ported version of the driver or a compatibility
issue. The data payload of the CAN frames is missing, when sending data. We
will use the version from v5.10 in our 5.4 tree instead as this is working fine.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>

By default the RV3028 does not switch to the backup voltage supply at
all, if the main supply is shut down. Let's add the possibility to
set the backup switching mode by programming the BSM bits in the
backup register.

0x0: No switching
0x4: Direct Switching Mode (DSM)
0xc: Level Switching Mode (LSM)
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>

This reverts commit 1a95edcc.

It is not meant to be applied in this branch as it provides a board
specific hack.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>

There can be issues with some devices when using 400 kHz clock and
we don't need high data rates, so just reduce the clock to 100 kHz
by default.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>

Joakim Zhang authored Jan 16, 2021 and Frieder Schrempf committed Mar 23, 2021

CLK_ENET_TIMER assigned clocks twice, should be a typo, correct to
CLK_ENET_PHY_REF clock.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

In order to output the internal reference clock to the pad to feed
the external PHY, we need to set a bit in the GPR register. This is
a hack and needs to be properly integrated into the driver.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>

This is a backport of the latest version of the driver from Linux
v5.12-rc3. On Linux 5.4 at least the following additional patches
are needed for compatibility:

ea780056 ("can: add optional DLC element to Classical CAN frame structure")
728fc9ff

 ("can: rx-offload: can_rx_offload_add_manual(): add new initialization function")
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>

Marc Kleine-Budde authored Sep 16, 2020 and Frieder Schrempf committed Mar 23, 2021

This patch adds a new initialization function:
can_rx_offload_add_manual()

It should be used to add support rx-offload to a driver, if the callback
mechanism should not be used. Use e.g. can_rx_offload_queue_sorted() to queue
skbs into rx-offload.

Link: https://lore.kernel.org/r/20200915223527.1417033-33-mkl@pengutronix.de

Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>

Oliver Hartkopp authored Nov 10, 2020 and Frieder Schrempf committed Mar 23, 2021

ISO 11898-1 Chapter 8.4.2.3 defines a 4 bit data length code (DLC) table which
maps the DLC to the payload length of the CAN frame in bytes:

    DLC      ->  payload length
    0 .. 8   ->  0 .. 8
    9 .. 15  ->  8

Although the DLC values 8 .. 15 in Classical CAN always result in a payload
length of 8 bytes these DLC values are transparently transmitted on the CAN
bus. As the struct can_frame only provides a 'len' element (formerly 'can_dlc')
which contains the plain payload length ( 0 .. 8 ) of the CAN frame, the raw
DLC is not visible to the application programmer, e.g. for testing use-cases.

To access the raw DLC values 9 .. 15 the len8_dlc element is introduced, which
is only valid when the payload length 'len' is 8 and the DLC is greater than 8.

The len8_dlc element is filled by the CAN interface driver and used for CAN
frame creation by the CAN driver when the CAN_CTRLMODE_CC_LEN8_DLC flag is
supported by the driver and enabled via netlink configuration interface.
Reported-by: Vincent Mailhol <mailhol.vincent@wanadoo.fr>
Signed-off-by: Oliver Hartkopp <socketcan@hartkopp.net>
Link: https://lore.kernel.org/r/20201110101852.1973-2-socketcan@hartkopp.net

Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>

The MCP2515 can be used with an SPI clock of up to 10 MHz. Set the
limit accordingly to prevent any performance issues caused by the
really low clock speed of 100 kHz.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>

This is the 5.4.105 stable release

Tested-by: Shuah Khan <skhan@linuxfoundation.org>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Jason Self <jason@bluehome.net>
Tested-by: Ross Schmidt <ross.schm.dev@gmail.com>
Tested-by: Linux Kernel Functional Testing <lkft@linaro.org>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Hulk Robot <hulkrobot@huawei.com>
Link: https://lore.kernel.org/r/20210310132320.550932445@linuxfoundation.org

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

[ Upstream commit 6e6a6828 ]

Add the NVME_QUIRK_NO_NS_DESC_LIST and NVME_QUIRK_IGNORE_DEV_SUBNQN
quirks for this buggy device.

Reported and tested in https://bugs.mageia.org/show_bug.cgi?id=28417

Signed-off-by: Pascal Terjan <pterjan@google.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>

[ Upstream commit 5e112d3f ]

The kernel fails to fully detect these SSDs, only the character devices
are present:

[   10.785605] nvme nvme0: pci function 0000:04:00.0
[   10.876787] nvme nvme1: pci function 0000:81:00.0
[   13.198614] nvme nvme0: missing or invalid SUBNQN field.
[   13.198658] nvme nvme1: missing or invalid SUBNQN field.
[   13.206896] nvme nvme0: Shutdown timeout set to 20 seconds
[   13.215035] nvme nvme1: Shutdown timeout set to 20 seconds
[   13.225407] nvme nvme0: 16/0/0 default/read/poll queues
[   13.233602] nvme nvme1: 16/0/0 default/read/poll queues
[   13.239627] nvme nvme0: Identify Descriptors failed (8194)
[   13.246315] nvme nvme1: Identify Descriptors failed (8194)

Adding the NVME_QUIRK_NO_NS_DESC_LIST fixes this problem.

BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=205679

Signed-off-by: Julian Einwag <jeinwag-nvme@marcapo.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Keith Busch <kbusch@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

[ Upstream commit fc6a31b0

 ]

The ITE8568 EC on the Voyo Winpad A15 presents itself as an I2C-HID
attached keyboard and mouse (which seems to never send any events).

This needs the I2C_HID_QUIRK_NO_IRQ_AFTER_RESET quirk, otherwise we get
the following errors:

[ 3688.770850] i2c_hid i2c-ITE8568:00: failed to reset device.
[ 3694.915865] i2c_hid i2c-ITE8568:00: failed to reset device.
[ 3701.059717] i2c_hid i2c-ITE8568:00: failed to reset device.
[ 3707.205944] i2c_hid i2c-ITE8568:00: failed to reset device.
[ 3708.227940] i2c_hid i2c-ITE8568:00: can't add hid device: -61
[ 3708.236518] i2c_hid: probe of i2c-ITE8568:00 failed with error -61

Which leads to a significant boot delay.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Signed-off-by: Sasha Levin <sashal@kernel.org>

[ Upstream commit 5f7dfda4

 ]

The SDHCI_PRESET_FOR_* registers are not set(all read as zeros), so
set the quirk.
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Link: https://lore.kernel.org/r/20201210165510.76b917e5@xhacker.debian

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

[ Upstream commit 8f03c30c

 ]

The PC_DBG_ECO_CNTL register on the Adreno A5xx family gets
programmed to some different values on a per-model basis.
At least, this is what we intend to do here;

Unfortunately, though, this register is being overwritten with a
static magic number, right after applying the GPU-specific
configuration (including the GPU-specific quirks) and that is
effectively nullifying the efforts.

Let's remove the redundant and wrong write to the PC_DBG_ECO_CNTL
register in order to retain the wanted configuration for the
target GPU.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

[ Upstream commit f6f1f8e6 ]

A dummy zero bit is sent preceding the data during a read transfer by the
Microchip 93LC46B eeprom (section 2.7 of[1]). This results in right shift
of data during a read. In order to ignore this bit a quirk can be added to
send an extra zero bit after the read address.

Add a quirk to ignore the zero bit sent before data by adding a zero bit
after the read address.

[1] - https://www.mouser.com/datasheet/2/268/20001749K-277859.pdf

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Link: https://lore.kernel.org/r/20210105105817.17644-3-a-govindraju@ti.com

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

[ Upstream commit 05998379 ]

Add function 1 DMA alias quirk for Marvell 88SS9215 PCIe SSD Controller.

Link: https://bugzilla.kernel.org/show_bug.cgi?id=42679#c135
Link: https://lore.kernel.org/r/20201110220516.697934-1-helgaas@kernel.org

Reported-by: John Smith <LK7S2ED64JHGLKj75shg9klejHWG49h5hk@protonmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

[ Upstream commit 1bea2256

 ]

Tha ARCHOS Cesium 140 tablet has problem with the jack-sensing,
thus the heaset functions are not working.

Add quirk for this model to select the correct input map, jack-detect
options and channel map to enable jack sensing and headset microphone.
This device uses IN1 for its internal MIC and JD2 for jack-detect.
Signed-off-by: Chris Chiu <chiu@endlessos.org>
Acked-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20201208060414.27646-1-chiu@endlessos.org

Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

[ Upstream commit 25417185

 ]

The GIGABYTE GB-BXBT-2807 is a mini-PC which uses off the shelf
components, like an Intel GPU which is meant for mobile systems.
As such, it, by default, has a backlight controller exposed.

Unfortunately, the backlight controller only confuses userspace, which
sees the existence of a backlight device node and has the unrealistic
belief that there is actually a backlight there!

Add a DMI quirk to force the backlight off on this system.
Signed-off-by: Jasper St. Pierre <jstpierre@mecheye.net>
Reviewed-by: Chris Chiu <chiu@endlessos.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>