Skip to content
Snippets Groups Projects

Compare revisions

Changes are shown as if the source revision was being merged into the target revision. Learn more about comparing revisions.

Source

Select target project
No results found

Target

Select target project
  • sw/misc/linux
1 result
Show changes
Showing
with 45 additions and 65 deletions
...@@ -88,9 +88,9 @@ &i2c4 { ...@@ -88,9 +88,9 @@ &i2c4 {
clock-frequency = <400000>; clock-frequency = <400000>;
vbus-supply = <&mt6358_vcn18_reg>; vbus-supply = <&mt6358_vcn18_reg>;
eeprom@54 { eeprom@50 {
compatible = "atmel,24c32"; compatible = "atmel,24c32";
reg = <0x54>; reg = <0x50>;
pagesize = <32>; pagesize = <32>;
vcc-supply = <&mt6358_vcn18_reg>; vcc-supply = <&mt6358_vcn18_reg>;
}; };
......
...@@ -290,6 +290,11 @@ dsi_out: endpoint { ...@@ -290,6 +290,11 @@ dsi_out: endpoint {
}; };
}; };
&dpi0 {
/* TODO Re-enable after DP to Type-C port muxing can be described */
status = "disabled";
};
&gic { &gic {
mediatek,broken-save-restore-fw; mediatek,broken-save-restore-fw;
}; };
......
...@@ -1845,6 +1845,10 @@ dpi0: dpi@14015000 { ...@@ -1845,6 +1845,10 @@ dpi0: dpi@14015000 {
<&mmsys CLK_MM_DPI_MM>, <&mmsys CLK_MM_DPI_MM>,
<&apmixedsys CLK_APMIXED_TVDPLL>; <&apmixedsys CLK_APMIXED_TVDPLL>;
clock-names = "pixel", "engine", "pll"; clock-names = "pixel", "engine", "pll";
port {
dpi_out: endpoint { };
};
}; };
mutex: mutex@14016000 { mutex: mutex@14016000 {
......
...@@ -10,12 +10,6 @@ ...@@ -10,12 +10,6 @@
/ { / {
chassis-type = "laptop"; chassis-type = "laptop";
max98360a: max98360a {
compatible = "maxim,max98360a";
sdmode-gpios = <&pio 150 GPIO_ACTIVE_HIGH>;
#sound-dai-cells = <0>;
};
}; };
&cpu6 { &cpu6 {
...@@ -59,19 +53,14 @@ &cluster1_opp_15 { ...@@ -59,19 +53,14 @@ &cluster1_opp_15 {
opp-hz = /bits/ 64 <2200000000>; opp-hz = /bits/ 64 <2200000000>;
}; };
&rt1019p{
status = "disabled";
};
&sound { &sound {
compatible = "mediatek,mt8186-mt6366-rt5682s-max98360-sound"; compatible = "mediatek,mt8186-mt6366-rt5682s-max98360-sound";
status = "okay"; };
spk-hdmi-playback-dai-link { &speaker_codec {
codec { compatible = "maxim,max98360a";
sound-dai = <&it6505dptx>, <&max98360a>; sdmode-gpios = <&pio 150 GPIO_ACTIVE_HIGH>;
}; /delete-property/ sdb-gpios;
};
}; };
&spmi { &spmi {
......
...@@ -259,15 +259,15 @@ spk-hdmi-playback-dai-link { ...@@ -259,15 +259,15 @@ spk-hdmi-playback-dai-link {
mediatek,clk-provider = "cpu"; mediatek,clk-provider = "cpu";
/* RT1019P and IT6505 connected to the same I2S line */ /* RT1019P and IT6505 connected to the same I2S line */
codec { codec {
sound-dai = <&it6505dptx>, <&rt1019p>; sound-dai = <&it6505dptx>, <&speaker_codec>;
}; };
}; };
}; };
rt1019p: speaker-codec { speaker_codec: speaker-codec {
compatible = "realtek,rt1019p"; compatible = "realtek,rt1019p";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&rt1019p_pins_default>; pinctrl-0 = <&speaker_codec_pins_default>;
#sound-dai-cells = <0>; #sound-dai-cells = <0>;
sdb-gpios = <&pio 150 GPIO_ACTIVE_HIGH>; sdb-gpios = <&pio 150 GPIO_ACTIVE_HIGH>;
}; };
...@@ -423,7 +423,7 @@ it6505dptx: dp-bridge@5c { ...@@ -423,7 +423,7 @@ it6505dptx: dp-bridge@5c {
#sound-dai-cells = <0>; #sound-dai-cells = <0>;
ovdd-supply = <&mt6366_vsim2_reg>; ovdd-supply = <&mt6366_vsim2_reg>;
pwr18-supply = <&pp1800_dpbrdg_dx>; pwr18-supply = <&pp1800_dpbrdg_dx>;
reset-gpios = <&pio 177 GPIO_ACTIVE_HIGH>; reset-gpios = <&pio 177 GPIO_ACTIVE_LOW>;
ports { ports {
#address-cells = <1>; #address-cells = <1>;
...@@ -1179,7 +1179,7 @@ pins { ...@@ -1179,7 +1179,7 @@ pins {
}; };
}; };
rt1019p_pins_default: rt1019p-default-pins { speaker_codec_pins_default: speaker-codec-default-pins {
pins-sdb { pins-sdb {
pinmux = <PINMUX_GPIO150__FUNC_GPIO150>; pinmux = <PINMUX_GPIO150__FUNC_GPIO150>;
output-low; output-low;
...@@ -1336,7 +1336,7 @@ mt6366_vgpu_reg: vgpu { ...@@ -1336,7 +1336,7 @@ mt6366_vgpu_reg: vgpu {
regulator-allowed-modes = <MT6397_BUCK_MODE_AUTO regulator-allowed-modes = <MT6397_BUCK_MODE_AUTO
MT6397_BUCK_MODE_FORCE_PWM>; MT6397_BUCK_MODE_FORCE_PWM>;
regulator-coupled-with = <&mt6366_vsram_gpu_reg>; regulator-coupled-with = <&mt6366_vsram_gpu_reg>;
regulator-coupled-max-spread = <10000>; regulator-coupled-max-spread = <100000>;
}; };
mt6366_vproc11_reg: vproc11 { mt6366_vproc11_reg: vproc11 {
...@@ -1545,7 +1545,7 @@ mt6366_vsram_gpu_reg: vsram-gpu { ...@@ -1545,7 +1545,7 @@ mt6366_vsram_gpu_reg: vsram-gpu {
regulator-ramp-delay = <6250>; regulator-ramp-delay = <6250>;
regulator-enable-ramp-delay = <240>; regulator-enable-ramp-delay = <240>;
regulator-coupled-with = <&mt6366_vgpu_reg>; regulator-coupled-with = <&mt6366_vgpu_reg>;
regulator-coupled-max-spread = <10000>; regulator-coupled-max-spread = <100000>;
}; };
mt6366_vsram_others_reg: vsram-others { mt6366_vsram_others_reg: vsram-others {
......
...@@ -956,9 +956,9 @@ mfg0: power-domain@MT8188_POWER_DOMAIN_MFG0 { ...@@ -956,9 +956,9 @@ mfg0: power-domain@MT8188_POWER_DOMAIN_MFG0 {
#size-cells = <0>; #size-cells = <0>;
#power-domain-cells = <1>; #power-domain-cells = <1>;
power-domain@MT8188_POWER_DOMAIN_MFG1 { mfg1: power-domain@MT8188_POWER_DOMAIN_MFG1 {
reg = <MT8188_POWER_DOMAIN_MFG1>; reg = <MT8188_POWER_DOMAIN_MFG1>;
clocks = <&topckgen CLK_APMIXED_MFGPLL>, clocks = <&apmixedsys CLK_APMIXED_MFGPLL>,
<&topckgen CLK_TOP_MFG_CORE_TMP>; <&topckgen CLK_TOP_MFG_CORE_TMP>;
clock-names = "mfg", "alt"; clock-names = "mfg", "alt";
mediatek,infracfg = <&infracfg_ao>; mediatek,infracfg = <&infracfg_ao>;
...@@ -1689,7 +1689,6 @@ u3port1: usb-phy@700 { ...@@ -1689,7 +1689,6 @@ u3port1: usb-phy@700 {
<&clk26m>; <&clk26m>;
clock-names = "ref", "da_ref"; clock-names = "ref", "da_ref";
#phy-cells = <1>; #phy-cells = <1>;
status = "disabled";
}; };
}; };
......
...@@ -438,7 +438,7 @@ audio_codec: codec@1a { ...@@ -438,7 +438,7 @@ audio_codec: codec@1a {
/* Realtek RT5682i or RT5682s, sharing the same configuration */ /* Realtek RT5682i or RT5682s, sharing the same configuration */
reg = <0x1a>; reg = <0x1a>;
interrupts-extended = <&pio 89 IRQ_TYPE_EDGE_BOTH>; interrupts-extended = <&pio 89 IRQ_TYPE_EDGE_BOTH>;
#sound-dai-cells = <0>; #sound-dai-cells = <1>;
realtek,jd-src = <1>; realtek,jd-src = <1>;
AVDD-supply = <&mt6359_vio18_ldo_reg>; AVDD-supply = <&mt6359_vio18_ldo_reg>;
...@@ -1181,7 +1181,7 @@ hs-playback-dai-link { ...@@ -1181,7 +1181,7 @@ hs-playback-dai-link {
link-name = "ETDM1_OUT_BE"; link-name = "ETDM1_OUT_BE";
mediatek,clk-provider = "cpu"; mediatek,clk-provider = "cpu";
codec { codec {
sound-dai = <&audio_codec>; sound-dai = <&audio_codec 0>;
}; };
}; };
...@@ -1189,7 +1189,7 @@ hs-capture-dai-link { ...@@ -1189,7 +1189,7 @@ hs-capture-dai-link {
link-name = "ETDM2_IN_BE"; link-name = "ETDM2_IN_BE";
mediatek,clk-provider = "cpu"; mediatek,clk-provider = "cpu";
codec { codec {
sound-dai = <&audio_codec>; sound-dai = <&audio_codec 0>;
}; };
}; };
......
...@@ -487,7 +487,7 @@ topckgen: syscon@10000000 { ...@@ -487,7 +487,7 @@ topckgen: syscon@10000000 {
}; };
infracfg_ao: syscon@10001000 { infracfg_ao: syscon@10001000 {
compatible = "mediatek,mt8195-infracfg_ao", "syscon", "simple-mfd"; compatible = "mediatek,mt8195-infracfg_ao", "syscon";
reg = <0 0x10001000 0 0x1000>; reg = <0 0x10001000 0 0x1000>;
#clock-cells = <1>; #clock-cells = <1>;
#reset-cells = <1>; #reset-cells = <1>;
...@@ -3331,11 +3331,9 @@ &larb19 &larb21 &larb24 &larb25 ...@@ -3331,11 +3331,9 @@ &larb19 &larb21 &larb24 &larb25
mutex1: mutex@1c101000 { mutex1: mutex@1c101000 {
compatible = "mediatek,mt8195-disp-mutex"; compatible = "mediatek,mt8195-disp-mutex";
reg = <0 0x1c101000 0 0x1000>; reg = <0 0x1c101000 0 0x1000>;
reg-names = "vdo1_mutex";
interrupts = <GIC_SPI 494 IRQ_TYPE_LEVEL_HIGH 0>; interrupts = <GIC_SPI 494 IRQ_TYPE_LEVEL_HIGH 0>;
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>; power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
clocks = <&vdosys1 CLK_VDO1_DISP_MUTEX>; clocks = <&vdosys1 CLK_VDO1_DISP_MUTEX>;
clock-names = "vdo1_mutex";
mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x1000 0x1000>; mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x1000 0x1000>;
mediatek,gce-events = <CMDQ_EVENT_VDO1_STREAM_DONE_ENG_0>; mediatek,gce-events = <CMDQ_EVENT_VDO1_STREAM_DONE_ENG_0>;
}; };
......
...@@ -187,7 +187,7 @@ mdio { ...@@ -187,7 +187,7 @@ mdio {
compatible = "snps,dwmac-mdio"; compatible = "snps,dwmac-mdio";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
eth_phy0: eth-phy0@1 { eth_phy0: ethernet-phy@1 {
compatible = "ethernet-phy-id001c.c916"; compatible = "ethernet-phy-id001c.c916";
reg = <0x1>; reg = <0x1>;
}; };
......
...@@ -351,7 +351,7 @@ mmc@700b0200 { ...@@ -351,7 +351,7 @@ mmc@700b0200 {
#size-cells = <0>; #size-cells = <0>;
wifi@1 { wifi@1 {
compatible = "brcm,bcm4354-fmac"; compatible = "brcm,bcm4354-fmac", "brcm,bcm4329-fmac";
reg = <1>; reg = <1>;
interrupt-parent = <&gpio>; interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(H, 2) IRQ_TYPE_LEVEL_HIGH>; interrupts = <TEGRA_GPIO(H, 2) IRQ_TYPE_LEVEL_HIGH>;
......
...@@ -707,7 +707,7 @@ &remoteproc_cdsp { ...@@ -707,7 +707,7 @@ &remoteproc_cdsp {
}; };
&remoteproc_mpss { &remoteproc_mpss {
firmware-name = "qcom/qcs6490/modem.mdt"; firmware-name = "qcom/qcs6490/modem.mbn";
status = "okay"; status = "okay";
}; };
......
...@@ -3889,7 +3889,7 @@ lmh@18358800 { ...@@ -3889,7 +3889,7 @@ lmh@18358800 {
}; };
cpufreq_hw: cpufreq@18323000 { cpufreq_hw: cpufreq@18323000 {
compatible = "qcom,cpufreq-hw"; compatible = "qcom,sc8180x-cpufreq-hw", "qcom,cpufreq-hw";
reg = <0 0x18323000 0 0x1400>, <0 0x18325800 0 0x1400>; reg = <0 0x18323000 0 0x1400>, <0 0x18325800 0 0x1400>;
reg-names = "freq-domain0", "freq-domain1"; reg-names = "freq-domain0", "freq-domain1";
......
...@@ -104,7 +104,7 @@ vreg_l10a_1p8: vreg-l10a-regulator { ...@@ -104,7 +104,7 @@ vreg_l10a_1p8: vreg-l10a-regulator {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "vreg_l10a_1p8"; regulator-name = "vreg_l10a_1p8";
regulator-min-microvolt = <1804000>; regulator-min-microvolt = <1804000>;
regulator-max-microvolt = <1896000>; regulator-max-microvolt = <1804000>;
regulator-always-on; regulator-always-on;
regulator-boot-on; regulator-boot-on;
}; };
......
...@@ -1376,43 +1376,43 @@ gpu_opp_table: opp-table { ...@@ -1376,43 +1376,43 @@ gpu_opp_table: opp-table {
opp-850000000 { opp-850000000 {
opp-hz = /bits/ 64 <850000000>; opp-hz = /bits/ 64 <850000000>;
opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>; opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
opp-supported-hw = <0x02>; opp-supported-hw = <0x03>;
}; };
opp-800000000 { opp-800000000 {
opp-hz = /bits/ 64 <800000000>; opp-hz = /bits/ 64 <800000000>;
opp-level = <RPMH_REGULATOR_LEVEL_TURBO>; opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
opp-supported-hw = <0x04>; opp-supported-hw = <0x07>;
}; };
opp-650000000 { opp-650000000 {
opp-hz = /bits/ 64 <650000000>; opp-hz = /bits/ 64 <650000000>;
opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
opp-supported-hw = <0x08>; opp-supported-hw = <0x0f>;
}; };
opp-565000000 { opp-565000000 {
opp-hz = /bits/ 64 <565000000>; opp-hz = /bits/ 64 <565000000>;
opp-level = <RPMH_REGULATOR_LEVEL_NOM>; opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
opp-supported-hw = <0x10>; opp-supported-hw = <0x1f>;
}; };
opp-430000000 { opp-430000000 {
opp-hz = /bits/ 64 <430000000>; opp-hz = /bits/ 64 <430000000>;
opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
opp-supported-hw = <0xff>; opp-supported-hw = <0x1f>;
}; };
opp-355000000 { opp-355000000 {
opp-hz = /bits/ 64 <355000000>; opp-hz = /bits/ 64 <355000000>;
opp-level = <RPMH_REGULATOR_LEVEL_SVS>; opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
opp-supported-hw = <0xff>; opp-supported-hw = <0x1f>;
}; };
opp-253000000 { opp-253000000 {
opp-hz = /bits/ 64 <253000000>; opp-hz = /bits/ 64 <253000000>;
opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
opp-supported-hw = <0xff>; opp-supported-hw = <0x1f>;
}; };
}; };
}; };
......
...@@ -594,8 +594,6 @@ &usb_1_ss0_qmpphy { ...@@ -594,8 +594,6 @@ &usb_1_ss0_qmpphy {
vdda-phy-supply = <&vreg_l3e_1p2>; vdda-phy-supply = <&vreg_l3e_1p2>;
vdda-pll-supply = <&vreg_l1j_0p8>; vdda-pll-supply = <&vreg_l1j_0p8>;
orientation-switch;
status = "okay"; status = "okay";
}; };
...@@ -628,8 +626,6 @@ &usb_1_ss1_qmpphy { ...@@ -628,8 +626,6 @@ &usb_1_ss1_qmpphy {
vdda-phy-supply = <&vreg_l3e_1p2>; vdda-phy-supply = <&vreg_l3e_1p2>;
vdda-pll-supply = <&vreg_l2d_0p9>; vdda-pll-supply = <&vreg_l2d_0p9>;
orientation-switch;
status = "okay"; status = "okay";
}; };
......
...@@ -898,8 +898,6 @@ &usb_1_ss0_qmpphy { ...@@ -898,8 +898,6 @@ &usb_1_ss0_qmpphy {
vdda-phy-supply = <&vreg_l3e_1p2>; vdda-phy-supply = <&vreg_l3e_1p2>;
vdda-pll-supply = <&vreg_l1j_0p8>; vdda-pll-supply = <&vreg_l1j_0p8>;
orientation-switch;
status = "okay"; status = "okay";
}; };
...@@ -932,8 +930,6 @@ &usb_1_ss1_qmpphy { ...@@ -932,8 +930,6 @@ &usb_1_ss1_qmpphy {
vdda-phy-supply = <&vreg_l3e_1p2>; vdda-phy-supply = <&vreg_l3e_1p2>;
vdda-pll-supply = <&vreg_l2d_0p9>; vdda-pll-supply = <&vreg_l2d_0p9>;
orientation-switch;
status = "okay"; status = "okay";
}; };
......
...@@ -279,8 +279,8 @@ CLUSTER_C4: cpu-sleep-0 { ...@@ -279,8 +279,8 @@ CLUSTER_C4: cpu-sleep-0 {
idle-state-name = "ret"; idle-state-name = "ret";
arm,psci-suspend-param = <0x00000004>; arm,psci-suspend-param = <0x00000004>;
entry-latency-us = <180>; entry-latency-us = <180>;
exit-latency-us = <320>; exit-latency-us = <500>;
min-residency-us = <1000>; min-residency-us = <600>;
}; };
}; };
...@@ -299,7 +299,7 @@ CLUSTER_CL5: cluster-sleep-1 { ...@@ -299,7 +299,7 @@ CLUSTER_CL5: cluster-sleep-1 {
idle-state-name = "ret-pll-off"; idle-state-name = "ret-pll-off";
arm,psci-suspend-param = <0x01000054>; arm,psci-suspend-param = <0x01000054>;
entry-latency-us = <2200>; entry-latency-us = <2200>;
exit-latency-us = <2500>; exit-latency-us = <4000>;
min-residency-us = <7000>; min-residency-us = <7000>;
}; };
}; };
...@@ -5752,7 +5752,7 @@ apps_smmu: iommu@15000000 { ...@@ -5752,7 +5752,7 @@ apps_smmu: iommu@15000000 {
intc: interrupt-controller@17000000 { intc: interrupt-controller@17000000 {
compatible = "arm,gic-v3"; compatible = "arm,gic-v3";
reg = <0 0x17000000 0 0x10000>, /* GICD */ reg = <0 0x17000000 0 0x10000>, /* GICD */
<0 0x17080000 0 0x480000>; /* GICR * 12 */ <0 0x17080000 0 0x300000>; /* GICR * 12 */
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
......
...@@ -69,9 +69,6 @@ &rcar_sound { ...@@ -69,9 +69,6 @@ &rcar_sound {
status = "okay"; status = "okay";
/* Single DAI */
#sound-dai-cells = <0>;
rsnd_port: port { rsnd_port: port {
rsnd_endpoint: endpoint { rsnd_endpoint: endpoint {
remote-endpoint = <&dw_hdmi0_snd_in>; remote-endpoint = <&dw_hdmi0_snd_in>;
......
...@@ -84,9 +84,6 @@ &rcar_sound { ...@@ -84,9 +84,6 @@ &rcar_sound {
pinctrl-names = "default"; pinctrl-names = "default";
status = "okay"; status = "okay";
/* Single DAI */
#sound-dai-cells = <0>;
/* audio_clkout0/1/2/3 */ /* audio_clkout0/1/2/3 */
#clock-cells = <1>; #clock-cells = <1>;
clock-frequency = <12288000 11289600>; clock-frequency = <12288000 11289600>;
......
...@@ -49,7 +49,6 @@ ...@@ -49,7 +49,6 @@
vcc3v3_eth: vcc3v3-eth-regulator { vcc3v3_eth: vcc3v3-eth-regulator {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
enable-active-low;
gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>; gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&vcc3v3_eth_enn>; pinctrl-0 = <&vcc3v3_eth_enn>;
......