diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts
index c3e112f717990c2eca445de89ef2034f4b5cbf63..97f7a525aa907e6c9d10b95736222c928e71d0e2 100644
--- a/arch/x86/dts/crownbay.dts
+++ b/arch/x86/dts/crownbay.dts
@@ -6,11 +6,10 @@
 
 /dts-v1/;
 
+/include/ "skeleton.dtsi"
 /include/ "serial.dtsi"
 
 / {
-	#address-cells = <1>;
-	#size-cells = <1>;
 	model = "Intel Crown Bay";
 	compatible = "intel,crownbay", "intel,queensbay";
 
@@ -32,14 +31,10 @@
 		bank-name = "B";
 	};
 
-	serial {
-		reg = <0x3f8 8>;
-		clock-frequency = <115200>;
+	chosen {
+		stdout-path = "/serial";
 	};
 
-	chosen { };
-	memory { device_type = "memory"; reg = <0 0>; };
-
 	spi {
 		#address-cells = <1>;
 		#size-cells = <0>;
diff --git a/arch/x86/dts/link.dts b/arch/x86/dts/link.dts
index c6b7d82b45022d34a992ee213b57444a783f9886..107af60004c4d811671dca927fa20520509151ff 100644
--- a/arch/x86/dts/link.dts
+++ b/arch/x86/dts/link.dts
@@ -1,10 +1,9 @@
 /dts-v1/;
 
+/include/ "skeleton.dtsi"
 /include/ "serial.dtsi"
 
 / {
-	#address-cells = <1>;
-	#size-cells = <1>;
 	model = "Google Link";
 	compatible = "google,link", "intel,celeron-ivybridge";
 
@@ -33,14 +32,10 @@
 		bank-name = "C";
 	};
 
-	serial {
-		reg = <0x3f8 8>;
-		clock-frequency = <115200>;
+	chosen {
+		stdout-path = "/serial";
 	};
 
-	chosen { };
-	memory { device_type = "memory"; reg = <0 0>; };
-
 	spd {
 		compatible = "memory-spd";
 		#address-cells = <1>;
diff --git a/arch/x86/dts/serial.dtsi b/arch/x86/dts/serial.dtsi
index 65a93acd3d56a10b07ab14bf6bdaf7ba51827feb..ebdda763dfed848c49cddbe35ad334159c40f538 100644
--- a/arch/x86/dts/serial.dtsi
+++ b/arch/x86/dts/serial.dtsi
@@ -1,17 +1,10 @@
-/include/ "skeleton.dtsi"
-
 / {
-	chosen {
-		stdout-path = "/serial";
-	};
-
 	serial {
 		compatible = "x86-uart";
-		reg = <0x3f8 0x10>;
+		reg = <0x3f8 8>;
 		reg-shift = <0>;
 		io-mapped = <1>;
 		multiplier = <1>;
 		baudrate = <115200>;
-		status = "disabled";
 	};
 };