diff --git a/arch/arm/cpu/armv7/omap5/abb.c b/arch/arm/cpu/armv7/omap5/abb.c
index 31b679516ff2c93547f1b5f52ddec2a246882e6d..3bf88979e5d62bad3a5565e8cef19e77aada065e 100644
--- a/arch/arm/cpu/armv7/omap5/abb.c
+++ b/arch/arm/cpu/armv7/omap5/abb.c
@@ -28,18 +28,25 @@
 s8 abb_setup_ldovbb(u32 fuse, u32 ldovbb)
 {
 	u32 vset;
+	u32 fuse_enable_mask = OMAP5_ABB_FUSE_ENABLE_MASK;
+	u32 fuse_vset_mask = OMAP5_ABB_FUSE_VSET_MASK;
 
+	if (!is_omap54xx()) {
+		/* DRA7 */
+		fuse_enable_mask = DRA7_ABB_FUSE_ENABLE_MASK;
+		fuse_vset_mask = DRA7_ABB_FUSE_VSET_MASK;
+	}
 	/*
 	 * ABB parameters must be properly fused
 	 * otherwise ABB should be disabled
 	 */
 	vset = readl(fuse);
-	if (!(vset & OMAP5_ABB_FUSE_ENABLE_MASK))
+	if (!(vset & fuse_enable_mask))
 		return -1;
 
 	/* prepare VSET value for LDOVBB mux register */
-	vset &= OMAP5_ABB_FUSE_VSET_MASK;
-	vset >>= ffs(OMAP5_ABB_FUSE_VSET_MASK) - 1;
+	vset &= fuse_vset_mask;
+	vset >>= ffs(fuse_vset_mask) - 1;
 	vset <<= ffs(OMAP5_ABB_LDOVBBMPU_VSET_OUT_MASK) - 1;
 	vset |= OMAP5_ABB_LDOVBBMPU_MUX_CTRL_MASK;
 
diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c b/arch/arm/cpu/armv7/omap5/prcm-regs.c
index 77c428b53539e8608bed36492e88bceccb7d2824..ff328070f77de8e85802c3563f70fcca68700b84 100644
--- a/arch/arm/cpu/armv7/omap5/prcm-regs.c
+++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c
@@ -432,11 +432,13 @@ struct omap_sys_ctrl_regs const dra7xx_ctrl = {
 	.control_srcomp_code_latch		= 0x4A002E84,
 	.control_ddr_control_ext_0		= 0x4A002E88,
 	.control_padconf_core_base		= 0x4A003400,
+	.control_std_fuse_opp_vdd_mpu_2		= 0x4A003B24,
 	.control_port_emif1_sdram_config	= 0x4AE0C110,
 	.control_port_emif1_lpddr2_nvm_config	= 0x4AE0C114,
 	.control_port_emif2_sdram_config	= 0x4AE0C118,
 	.control_emif1_sdram_config_ext		= 0x4AE0C144,
 	.control_emif2_sdram_config_ext		= 0x4AE0C148,
+	.control_wkup_ldovbb_mpu_voltage_ctrl	= 0x4AE0C158,
 	.control_padconf_mode			= 0x4AE0C5A0,
 	.control_xtal_oscillator		= 0x4AE0C5A4,
 	.control_i2c_2				= 0x4AE0C5A8,
@@ -807,6 +809,9 @@ struct prcm_regs const dra7xx_prcm = {
 	.cm_dsp_clkstctrl			= 0x4a005400,
 	.cm_dsp_dsp_clkctrl			= 0x4a005420,
 
+	/* prm irqstatus regs */
+	.prm_irqstatus_mpu_2			= 0x4ae06014,
+
 	/* cm2.ckgen */
 	.cm_clksel_usb_60mhz			= 0x4a008104,
 	.cm_clkmode_dpll_per			= 0x4a008140,
@@ -967,4 +972,7 @@ struct prcm_regs const dra7xx_prcm = {
 	.prm_vc_val_bypass			= 0x4ae07da0,
 	.prm_vc_cfg_i2c_mode			= 0x4ae07db4,
 	.prm_vc_cfg_i2c_clk			= 0x4ae07db8,
+
+	.prm_abbldo_mpu_setup			= 0x4AE07DDC,
+	.prm_abbldo_mpu_ctrl			= 0x4AE07DE0,
 };
diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h
index 34f6fc5f3529ea81c124d5a8098e3c75c8c095f2..19fdecec01bb77671a9df5df903c6b67e01b47b7 100644
--- a/arch/arm/include/asm/arch-omap5/omap.h
+++ b/arch/arm/include/asm/arch-omap5/omap.h
@@ -205,6 +205,8 @@ struct s32ktimer {
 /* ABB efuse masks */
 #define OMAP5_ABB_FUSE_VSET_MASK		(0x1F << 24)
 #define OMAP5_ABB_FUSE_ENABLE_MASK		(0x1 << 29)
+#define DRA7_ABB_FUSE_VSET_MASK			(0x1F << 20)
+#define DRA7_ABB_FUSE_ENABLE_MASK		(0x1 << 25)
 #define OMAP5_ABB_LDOVBBMPU_MUX_CTRL_MASK	(0x1 << 10)
 #define OMAP5_ABB_LDOVBBMPU_VSET_OUT_MASK	(0x1f << 0)