diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c index a90360f2df9ef887d6b4938153ea814b8225b1e8..b76e4eb528a1eb58d22f28fee74796b289e8a0a7 100644 --- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c +++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c @@ -29,6 +29,7 @@ #include <asm/arch/crm_regs.h> #include <pca953x.h> #include <power/pmic.h> +#include <power/pfuze100_pmic.h> #include "../common/pfuze.h" DECLARE_GLOBAL_DATA_PTR; @@ -494,11 +495,16 @@ int board_spi_cs_gpio(unsigned bus, unsigned cs) int power_init_board(void) { struct pmic *p; + unsigned int ret; p = pfuze_common_init(I2C_PMIC); if (!p) return -ENODEV; + ret = pfuze_mode_init(p, APS_PFM); + if (ret < 0) + return ret; + return 0; } diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index 2f7198d3bfdfc0b438ec185973d62dcb3dc45156..bb2dd9624ba162042da4320d5a37d5c237187524 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -631,12 +631,16 @@ int board_init(void) int power_init_board(void) { struct pmic *p; - unsigned int reg; + unsigned int reg, ret; p = pfuze_common_init(I2C_PMIC); if (!p) return -ENODEV; + ret = pfuze_mode_init(p, APS_PFM); + if (ret < 0) + return ret; + /* Increase VGEN3 from 2.5 to 2.8V */ pmic_reg_read(p, PFUZE100_VGEN3VOL, ®); reg &= ~LDO_VOL_MASK; diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c b/board/freescale/mx6sxsabresd/mx6sxsabresd.c index a2c9aae32cd3a03bf3d68dbe3c80a0e9615f5258..2ff960e3bb784149ccc2650f5e8700b3a9ee8a4d 100644 --- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c +++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c @@ -199,12 +199,16 @@ static struct i2c_pads_info i2c_pad_info1 = { int power_init_board(void) { struct pmic *p; - unsigned int reg; + unsigned int reg, ret; p = pfuze_common_init(I2C_PMIC); if (!p) return -ENODEV; + ret = pfuze_mode_init(p, APS_PFM); + if (ret < 0) + return ret; + /* Enable power of VGEN5 3V3, needed for SD3 */ pmic_reg_read(p, PFUZE100_VGEN5VOL, ®); reg &= ~LDO_VOL_MASK;