api/Kconfig

+config API
+	bool "Enable U-Boot API"
+	depends on CC_IS_GCC
+	help
+	  This option enables the U-Boot API. See api/README for more information.
+
+menu "API"
+	depends on API
+
+config SYS_MMC_MAX_DEVICE
+	int  "Maximum number of MMC devices exposed via the API"
+	default 1
+
+config EXAMPLES
+	bool "Compile API examples"
+	depends on !SANDBOX
+	default y if ARCH_QEMU
+	help
+	  U-Boot provides an API for standalone applications. Examples are
+	  provided in directory examples/.
+
+config STANDALONE_LOAD_ADDR
+	depends on EXAMPLES
+	hex "Address in memory to link standalone applications to"
+	default 0xffffffff80200000 if MIPS && 64BIT
+	default 0x8c000000 if SH
+	default 0x82000000 if ARC
+	default 0x80f00000 if MICROBLAZE
+	default 0x80300000 if ARCH_OMAP2PLUS || FSL_LSCH2 || FSL_LSCH3
+	default 0x80200000 if MIPS && 32BIT
+	default 0x0c100000 if ARM
+	default 0x02000000 if NIOS2
+	default 0x00040000 if PPC || X86
+	default 0x00020000 if M68K
+	default 0x0 if RISCV
+	default SYS_LOAD_ADDR
+	help
+	  This option defines a board specific value for the address where
+	  standalone program gets loaded, thus overwriting the architecture
+	  dependent default settings.
+
+endmenu

api/Makefile

+# SPDX-License-Identifier: GPL-2.0+
 #
 # (C) Copyright 2007 Semihalf
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
 
 obj-y += api.o api_display.o api_net.o api_storage.o
 obj-$(CONFIG_ARM) += api_platform-arm.o
 obj-$(CONFIG_PPC) += api_platform-powerpc.o
+obj-$(CONFIG_MIPS) += api_platform-mips.o

api/api_display.c

+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (c) 2011 The Chromium OS Authors.
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>
 #include <api_public.h>
-#include <lcd.h>
-#include <video_font.h> /* Get font width and height */
-
-/* lcd.h needs BMP_LOGO_HEIGHT to calculate CONSOLE_ROWS */
-#if defined(CONFIG_LCD_LOGO) && !defined(CONFIG_LCD_INFO_BELOW_LOGO)
-#include <bmp_logo.h>
-#endif
+#include <log.h>
 
 /* TODO(clchiou): add support of video device */
 
@@ -25,14 +19,6 @@ int display_get_info(int type, struct display_info *di)
 		debug("%s: unsupport display device type: %d\n",
 				__FILE__, type);
 		return API_ENODEV;
-#ifdef CONFIG_LCD
-	case DISPLAY_TYPE_LCD:
-		di->pixel_width  = panel_info.vl_col;
-		di->pixel_height = panel_info.vl_row;
-		di->screen_rows = lcd_get_screen_rows();
-		di->screen_cols = lcd_get_screen_columns();
-		break;
-#endif
 	}
 
 	di->type = type;
@@ -43,16 +29,9 @@ int display_draw_bitmap(ulong bitmap, int x, int y)
 {
 	if (!bitmap)
 		return API_EINVAL;
-#ifdef CONFIG_LCD
-	return lcd_display_bitmap(bitmap, x, y);
-#else
 	return API_ENODEV;
-#endif
 }
 
 void display_clear(void)
 {
-#ifdef CONFIG_LCD
-	lcd_clear();
-#endif
 }

api/api_net.c

+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2007 Semihalf
  *
  * Written by: Rafal Jaworowski <raj@semihalf.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <config.h>
@@ -12,8 +11,6 @@
 #include <linux/types.h>
 #include <api_public.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
 #define DEBUG
 #undef DEBUG
 
@@ -25,7 +22,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define errf(fmt, args...) do { printf("ERROR @ %s(): ", __func__); printf(fmt, ##args); } while (0)
 
-#ifdef CONFIG_CMD_NET
+#if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH)
 
 static int dev_valid_net(void *cookie)
 {

api/api_platform-arm.c

+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2007 Semihalf
  *
  * Written by: Rafal Jaworowski <raj@semihalf.com>
  *
- * SPDX-License-Identifier:	GPL-2.0+
- *
  * This file contains routines that fetch data from ARM-dependent sources
  * (bd_info etc.)
  */

api/api_platform-mips.c

+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2007 Stanislav Galabov <sgalabov@gmail.com>
+ *
+ * This file contains routines that fetch data from bd_info sources
+ */
+
+#include <config.h>
+#include <linux/types.h>
+#include <api_public.h>
+
+#include <asm/u-boot.h>
+#include <asm/global_data.h>
+
+#include "api_private.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Important notice: handling of individual fields MUST be kept in sync with
+ * include/asm-generic/u-boot.h, so any changes
+ * need to reflect their current state and layout of structures involved!
+ */
+int platform_sys_info(struct sys_info *si)
+{
+
+	platform_set_mr(si, gd->ram_base, gd->ram_size, MR_ATTR_DRAM);
+
+	return 1;
+}

api/api_platform-powerpc.c

+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2007 Semihalf
  *
  * Written by: Rafal Jaworowski <raj@semihalf.com>
  *
- * SPDX-License-Identifier:	GPL-2.0+
- *
  * This file contains routines that fetch data from PowerPC-dependent sources
  * (bd_info etc.)
  */
@@ -30,11 +29,8 @@ int platform_sys_info(struct sys_info *si)
 	si->clk_bus = gd->bus_clk;
 	si->clk_cpu = gd->cpu_clk;
 
-#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || \
-    defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
+#if defined(CONFIG_MPC8xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
 #define bi_bar	bi_immr_base
-#elif defined(CONFIG_MPC5xxx)
-#define bi_bar	bi_mbar_base
 #elif defined(CONFIG_MPC83xx)
 #define bi_bar	bi_immrbar
 #endif
@@ -46,7 +42,7 @@ int platform_sys_info(struct sys_info *si)
 	si->bar = 0;
 #endif
 
-	platform_set_mr(si, gd->bd->bi_memstart, gd->bd->bi_memsize, MR_ATTR_DRAM);
+	platform_set_mr(si, gd->ram_base, gd->ram_size, MR_ATTR_DRAM);
 	platform_set_mr(si, gd->bd->bi_flashstart, gd->bd->bi_flashsize, MR_ATTR_FLASH);
 	platform_set_mr(si, gd->bd->bi_sramstart, gd->bd->bi_sramsize, MR_ATTR_SRAM);
 

api/api_private.h

+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2007 Semihalf
  *
  * Written by: Rafal Jaworowski <raj@semihalf.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef _API_PRIVATE_H_
 #define _API_PRIVATE_H_
 
-void	api_init(void);
+int	api_init(void);
 void	platform_set_mr(struct sys_info *, unsigned long, unsigned long, int);
 int	platform_sys_info(struct sys_info *);
 
@@ -23,6 +22,7 @@ int	dev_close_stor(void *);
 int	dev_close_net(void *);
 
 lbasize_t	dev_read_stor(void *, void *, lbasize_t, lbastart_t);
+lbasize_t	dev_write_stor(void *, void *, lbasize_t, lbastart_t);
 int		dev_read_net(void *, void *, int);
 int		dev_write_net(void *, void *, int);
 

arch/arc/Kconfig

@@ -4,9 +4,6 @@ menu "ARC architecture"
 config SYS_ARCH
 	default "arc"
 
-config USE_PRIVATE_LIBGCC
-	default y
-
 config SYS_CPU
 	default "arcv1" if ISA_ARCOMPACT
 	default "arcv2" if ISA_ARCV2
@@ -34,36 +31,36 @@ choice
 
 config CPU_ARC750D
 	bool "ARC 750D"
-	select ARC_MMU_V2
 	depends on ISA_ARCOMPACT
+	select ARC_MMU_V2
 	help
 	  Choose this option to build an U-Boot for ARC750D CPU.
 
 config CPU_ARC770D
 	bool "ARC 770D"
-	select ARC_MMU_V3
 	depends on ISA_ARCOMPACT
+	select ARC_MMU_V3
 	help
 	  Choose this option to build an U-Boot for ARC770D CPU.
 
 config CPU_ARCEM6
 	bool "ARC EM6"
-	select ARC_MMU_ABSENT
 	depends on ISA_ARCV2
+	select ARC_MMU_ABSENT
 	help
 	  Next Generation ARC Core based on ISA-v2 ISA without MMU.
 
 config CPU_ARCHS36
 	bool "ARC HS36"
-	select ARC_MMU_ABSENT
 	depends on ISA_ARCV2
+	select ARC_MMU_ABSENT
 	help
 	  Next Generation ARC Core based on ISA-v2 ISA without MMU.
 
 config CPU_ARCHS38
 	bool "ARC HS38"
-	select ARC_MMU_V4
 	depends on ISA_ARCV2
+	select ARC_MMU_V4
 	help
 	  Next Generation ARC Core based on ISA-v2 ISA with MMU.
 
@@ -105,48 +102,92 @@ config ARC_MMU_V4
 
 endchoice
 
+config ARC_MMU_VER
+	int
+	default 0 if ARC_MMU_ABSENT
+	default 2 if ARC_MMU_V2
+	default 3 if ARC_MMU_V3
+	default 4 if ARC_MMU_V4
+
 config CPU_BIG_ENDIAN
 	bool "Enable Big Endian Mode"
-	default n
 	help
 	  Build kernel for Big Endian Mode of ARC CPU
 
 config SYS_ICACHE_OFF
-	bool "Do not use Instruction Cache"
-	default n
+	bool "Do not enable icache"
+	help
+	  Do not enable instruction cache in U-Boot.
+
+config SPL_SYS_ICACHE_OFF
+	bool "Do not enable icache in SPL"
+	depends on SPL
+	default SYS_ICACHE_OFF
+	help
+	  Do not enable instruction cache in SPL.
 
 config SYS_DCACHE_OFF
-	bool "Do not use Data Cache"
-	default n
+	bool "Do not enable dcache"
+	help
+	  Do not enable data cache in U-Boot.
 
-config ARC_CACHE_LINE_SHIFT
-	int "Cache Line Length (as power of 2)"
-	range 5 7
-	default "6"
-	depends on !SYS_DCACHE_OFF || !SYS_ICACHE_OFF
+config SPL_SYS_DCACHE_OFF
+	bool "Do not enable dcache in SPL"
+	depends on SPL
+	default SYS_DCACHE_OFF
 	help
-	  Starting with ARC700 4.9, Cache line length is configurable,
-	  This option specifies "N", with Line-len = 2 power N
-	  So line lengths of 32, 64, 128 are specified by 5,6,7, respectively
-	  Linux only supports same line lengths for I and D caches.
+	  Do not enable data cache in SPL.
+
+menuconfig ARC_DBG
+	bool "ARC debugging"
+
+if ARC_DBG
+
+config ARC_DBG_IOC_ENABLE
+	bool "Enable IO coherency unit"
+	depends on CPU_ARCHS38
+	help
+	  Enable IO coherency unit to debug problems with caches and
+	  DMA peripherals.
+	  NOTE: as of today linux will not work properly if this option
+	  is enabled in u-boot!
+
+endif
 
 choice
 	prompt "Target select"
-	optional
+	default TARGET_AXS103
 
 config TARGET_TB100
 	bool "Support tb100"
 
-config TARGET_ARCANGEL4
-	bool "Support arcangel4"
+config TARGET_NSIM
+	bool "Support ARC simulation & prototyping platforms"
 
 config TARGET_AXS101
-	bool "Support axs101"
+	bool "Support Synopsys Designware SDP board AXS101"
+
+config TARGET_AXS103
+	bool "Support Synopsys Designware SDP board AXS103"
+
+config TARGET_EMSDP
+	bool "Synopsys EM Software Development Platform"
+	select CPU_ARCEM6
+
+config TARGET_HSDK
+	bool "Support Synopsys HSDK or HSDK-4xD board"
+
+config TARGET_IOT_DEVKIT
+	bool "Synopsys Brite IoT Development kit"
+	select CPU_ARCEM6
 
 endchoice
 
 source "board/abilis/tb100/Kconfig"
-source "board/synopsys/Kconfig"
-source "board/synopsys/axs101/Kconfig"
+source "board/synopsys/axs10x/Kconfig"
+source "board/synopsys/emsdp/Kconfig"
+source "board/synopsys/hsdk/Kconfig"
+source "board/synopsys/iot_devkit/Kconfig"
+source "board/synopsys/nsim/Kconfig"
 
 endmenu

arch/arc/Makefile

-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
+# SPDX-License-Identifier: GPL-2.0+
 
 libs-y += arch/arc/cpu/$(CPU)/
 libs-y += arch/arc/lib/

arch/arc/cpu/arcv1/Makefile

+# SPDX-License-Identifier: GPL-2.0+
 #
 # Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
 
 obj-y += ivt.o