Kconfig

menu "mpc85xx CPU"
	depends on MPC85xx

config SYS_CPU
	default "mpc85xx"

choice
	prompt "Target select"
	optional

config TARGET_SBC8548
	bool "Support sbc8548"
	select ARCH_MPC8548

config TARGET_SOCRATES
	bool "Support socrates"
	select ARCH_MPC8544

config TARGET_B4420QDS
	bool "Support B4420QDS"
	select ARCH_B4420
	select SUPPORT_SPL
	select PHYS_64BIT

config TARGET_B4860QDS
	bool "Support B4860QDS"
	select ARCH_B4860
	select BOARD_LATE_INIT if CHAIN_OF_TRUST
	select SUPPORT_SPL
	select PHYS_64BIT

config TARGET_BSC9131RDB
	bool "Support BSC9131RDB"
	select ARCH_BSC9131
	select SUPPORT_SPL
	select BOARD_EARLY_INIT_F

config TARGET_BSC9132QDS
	bool "Support BSC9132QDS"
	select ARCH_BSC9132
	select BOARD_LATE_INIT if CHAIN_OF_TRUST
	select SUPPORT_SPL
	select BOARD_EARLY_INIT_F

config TARGET_C29XPCIE
	bool "Support C29XPCIE"
	select ARCH_C29X
	select BOARD_LATE_INIT if CHAIN_OF_TRUST
	select SUPPORT_SPL
	select SUPPORT_TPL
	select PHYS_64BIT

config TARGET_P3041DS
	bool "Support P3041DS"
	select PHYS_64BIT
	select ARCH_P3041
	select BOARD_LATE_INIT if CHAIN_OF_TRUST

config TARGET_P4080DS
	bool "Support P4080DS"
	select PHYS_64BIT
	select ARCH_P4080
	select BOARD_LATE_INIT if CHAIN_OF_TRUST

config TARGET_P5020DS
	bool "Support P5020DS"
	select PHYS_64BIT
	select ARCH_P5020
	select BOARD_LATE_INIT if CHAIN_OF_TRUST

config TARGET_P5040DS
	bool "Support P5040DS"
	select PHYS_64BIT
	select ARCH_P5040
	select BOARD_LATE_INIT if CHAIN_OF_TRUST

config TARGET_MPC8536DS
	bool "Support MPC8536DS"
	select ARCH_MPC8536
# Use DDR3 controller with DDR2 DIMMs on this board
	select SYS_FSL_DDRC_GEN3

config TARGET_MPC8540ADS
	bool "Support MPC8540ADS"
	select ARCH_MPC8540

config TARGET_MPC8541CDS
	bool "Support MPC8541CDS"
	select ARCH_MPC8541

config TARGET_MPC8544DS
	bool "Support MPC8544DS"
	select ARCH_MPC8544

config TARGET_MPC8548CDS
	bool "Support MPC8548CDS"
	select ARCH_MPC8548

config TARGET_MPC8555CDS
	bool "Support MPC8555CDS"
	select ARCH_MPC8555

config TARGET_MPC8560ADS
	bool "Support MPC8560ADS"
	select ARCH_MPC8560

config TARGET_MPC8568MDS
	bool "Support MPC8568MDS"
	select ARCH_MPC8568

config TARGET_MPC8569MDS
	bool "Support MPC8569MDS"
	select ARCH_MPC8569

config TARGET_MPC8572DS
	bool "Support MPC8572DS"
	select ARCH_MPC8572
# Use DDR3 controller with DDR2 DIMMs on this board
	select SYS_FSL_DDRC_GEN3

config TARGET_P1010RDB_PA
	bool "Support P1010RDB_PA"
	select ARCH_P1010
	select BOARD_LATE_INIT if CHAIN_OF_TRUST
	select SUPPORT_SPL
	select SUPPORT_TPL

config TARGET_P1010RDB_PB
	bool "Support P1010RDB_PB"
	select ARCH_P1010
	select BOARD_LATE_INIT if CHAIN_OF_TRUST
	select SUPPORT_SPL
	select SUPPORT_TPL

config TARGET_P1022DS
	bool "Support P1022DS"
	select ARCH_P1022
	select SUPPORT_SPL
	select SUPPORT_TPL

config TARGET_P1023RDB
	bool "Support P1023RDB"
	select ARCH_P1023

config TARGET_P1020MBG
	bool "Support P1020MBG-PC"
	select SUPPORT_SPL
	select SUPPORT_TPL
	select ARCH_P1020

config TARGET_P1020RDB_PC
	bool "Support P1020RDB-PC"
	select SUPPORT_SPL
	select SUPPORT_TPL
	select ARCH_P1020

config TARGET_P1020RDB_PD
	bool "Support P1020RDB-PD"
	select SUPPORT_SPL
	select SUPPORT_TPL
	select ARCH_P1020

config TARGET_P1020UTM
	bool "Support P1020UTM"
	select SUPPORT_SPL
	select SUPPORT_TPL
	select ARCH_P1020

config TARGET_P1021RDB
	bool "Support P1021RDB"
	select SUPPORT_SPL
	select SUPPORT_TPL
	select ARCH_P1021

config TARGET_P1024RDB
	bool "Support P1024RDB"
	select SUPPORT_SPL
	select SUPPORT_TPL
	select ARCH_P1024

config TARGET_P1025RDB
	bool "Support P1025RDB"
	select SUPPORT_SPL
	select SUPPORT_TPL
	select ARCH_P1025

config TARGET_P2020RDB
	bool "Support P2020RDB-PC"
	select SUPPORT_SPL
	select SUPPORT_TPL
	select ARCH_P2020

config TARGET_P1_TWR
	bool "Support p1_twr"
	select ARCH_P1025

config TARGET_P2041RDB
	bool "Support P2041RDB"
	select ARCH_P2041
	select BOARD_LATE_INIT if CHAIN_OF_TRUST
	select PHYS_64BIT

config TARGET_QEMU_PPCE500
	bool "Support qemu-ppce500"
	select ARCH_QEMU_E500
	select PHYS_64BIT

config TARGET_T1024QDS
	bool "Support T1024QDS"
	select ARCH_T1024
	select BOARD_LATE_INIT if CHAIN_OF_TRUST
	select SUPPORT_SPL
	select PHYS_64BIT

config TARGET_T1023RDB
	bool "Support T1023RDB"
	select ARCH_T1023
	select BOARD_LATE_INIT if CHAIN_OF_TRUST
	select SUPPORT_SPL
	select PHYS_64BIT

config TARGET_T1024RDB
	bool "Support T1024RDB"
	select ARCH_T1024
	select BOARD_LATE_INIT if CHAIN_OF_TRUST
	select SUPPORT_SPL
	select PHYS_64BIT

config TARGET_T1040QDS
	bool "Support T1040QDS"
	select ARCH_T1040
	select BOARD_LATE_INIT if CHAIN_OF_TRUST
	select PHYS_64BIT

config TARGET_T1040RDB
	bool "Support T1040RDB"
	select ARCH_T1040
	select BOARD_LATE_INIT if CHAIN_OF_TRUST
	select SUPPORT_SPL
	select PHYS_64BIT

config TARGET_T1040D4RDB
	bool "Support T1040D4RDB"
	select ARCH_T1040
	select BOARD_LATE_INIT if CHAIN_OF_TRUST
	select SUPPORT_SPL
	select PHYS_64BIT

config TARGET_T1042RDB
	bool "Support T1042RDB"
	select ARCH_T1042
	select BOARD_LATE_INIT if CHAIN_OF_TRUST
	select SUPPORT_SPL
	select PHYS_64BIT

config TARGET_T1042D4RDB
	bool "Support T1042D4RDB"
	select ARCH_T1042
	select BOARD_LATE_INIT if CHAIN_OF_TRUST
	select SUPPORT_SPL
	select PHYS_64BIT

config TARGET_T1042RDB_PI
	bool "Support T1042RDB_PI"
	select ARCH_T1042
	select BOARD_LATE_INIT if CHAIN_OF_TRUST
	select SUPPORT_SPL
	select PHYS_64BIT

config TARGET_T2080QDS
	bool "Support T2080QDS"
	select ARCH_T2080
	select BOARD_LATE_INIT if CHAIN_OF_TRUST
	select SUPPORT_SPL
	select PHYS_64BIT

config TARGET_T2080RDB
	bool "Support T2080RDB"
	select ARCH_T2080
	select BOARD_LATE_INIT if CHAIN_OF_TRUST
	select SUPPORT_SPL
	select PHYS_64BIT

config TARGET_T2081QDS
	bool "Support T2081QDS"
	select ARCH_T2081
	select SUPPORT_SPL
	select PHYS_64BIT

config TARGET_T4160QDS
	bool "Support T4160QDS"
	select ARCH_T4160
	select BOARD_LATE_INIT if CHAIN_OF_TRUST
	select SUPPORT_SPL
	select PHYS_64BIT

config TARGET_T4160RDB
	bool "Support T4160RDB"
	select ARCH_T4160
	select SUPPORT_SPL
	select PHYS_64BIT

config TARGET_T4240QDS
	bool "Support T4240QDS"
	select ARCH_T4240
	select BOARD_LATE_INIT if CHAIN_OF_TRUST
	select SUPPORT_SPL
	select PHYS_64BIT

config TARGET_T4240RDB
	bool "Support T4240RDB"
	select ARCH_T4240
	select SUPPORT_SPL
	select PHYS_64BIT

config TARGET_CONTROLCENTERD
	bool "Support controlcenterd"
	select ARCH_P1022

config TARGET_KMP204X
	bool "Support kmp204x"
	select ARCH_P2041
	select PHYS_64BIT
	imply CMD_CRAMFS
	imply FS_CRAMFS

config TARGET_XPEDITE520X
	bool "Support xpedite520x"
	select ARCH_MPC8548

config TARGET_XPEDITE537X
	bool "Support xpedite537x"
	select ARCH_MPC8572
# Use DDR3 controller with DDR2 DIMMs on this board
	select SYS_FSL_DDRC_GEN3

config TARGET_XPEDITE550X
	bool "Support xpedite550x"
	select ARCH_P2020

config TARGET_UCP1020
	bool "Support uCP1020"
	select ARCH_P1020

config TARGET_CYRUS_P5020
	bool "Support Varisys Cyrus P5020"
	select ARCH_P5020
	select PHYS_64BIT

config TARGET_CYRUS_P5040
	 bool "Support Varisys Cyrus P5040"
	select ARCH_P5040
	select PHYS_64BIT

endchoice

config ARCH_B4420
	bool
	select E500MC
	select E6500
	select FSL_LAW
	select SYS_FSL_DDR_VER_47
	select SYS_FSL_ERRATUM_A004477
	select SYS_FSL_ERRATUM_A005871
	select SYS_FSL_ERRATUM_A006379
	select SYS_FSL_ERRATUM_A006384
	select SYS_FSL_ERRATUM_A006475
	select SYS_FSL_ERRATUM_A006593
	select SYS_FSL_ERRATUM_A007075
	select SYS_FSL_ERRATUM_A007186
	select SYS_FSL_ERRATUM_A007212
	select SYS_FSL_ERRATUM_A009942
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_SEC
	select SYS_FSL_QORIQ_CHASSIS2
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_4
	select SYS_PPC64
	select FSL_IFC

config ARCH_B4860
	bool
	select E500MC
	select E6500
	select FSL_LAW
	select SYS_FSL_DDR_VER_47
	select SYS_FSL_ERRATUM_A004477
	select SYS_FSL_ERRATUM_A005871
	select SYS_FSL_ERRATUM_A006379
	select SYS_FSL_ERRATUM_A006384
	select SYS_FSL_ERRATUM_A006475
	select SYS_FSL_ERRATUM_A006593
	select SYS_FSL_ERRATUM_A007075
	select SYS_FSL_ERRATUM_A007186
	select SYS_FSL_ERRATUM_A007212
	select SYS_FSL_ERRATUM_A007907
	select SYS_FSL_ERRATUM_A009942
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_SEC
	select SYS_FSL_QORIQ_CHASSIS2
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_4
	select SYS_PPC64
	select FSL_IFC

config ARCH_BSC9131
	bool
	select FSL_LAW
	select SYS_FSL_DDR_VER_44
	select SYS_FSL_ERRATUM_A004477
	select SYS_FSL_ERRATUM_A005125
	select SYS_FSL_ERRATUM_ESDHC111
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_SEC
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_4
	select FSL_IFC

config ARCH_BSC9132
	bool
	select FSL_LAW
	select SYS_FSL_DDR_VER_46
	select SYS_FSL_ERRATUM_A004477
	select SYS_FSL_ERRATUM_A005125
	select SYS_FSL_ERRATUM_A005434
	select SYS_FSL_ERRATUM_ESDHC111
	select SYS_FSL_ERRATUM_I2C_A004447
	select SYS_FSL_ERRATUM_IFC_A002769
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_SEC
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_4
	select SYS_PPC_E500_USE_DEBUG_TLB
	select FSL_IFC

config ARCH_C29X
	bool
	select FSL_LAW
	select SYS_FSL_DDR_VER_46
	select SYS_FSL_ERRATUM_A005125
	select SYS_FSL_ERRATUM_ESDHC111
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_SEC
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_6
	select SYS_PPC_E500_USE_DEBUG_TLB
	select FSL_IFC

config ARCH_MPC8536
	bool
	select FSL_LAW
	select SYS_FSL_ERRATUM_A004508
	select SYS_FSL_ERRATUM_A005125
	select SYS_FSL_HAS_DDR2
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_SEC
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_2
	select SYS_PPC_E500_USE_DEBUG_TLB
	select FSL_ELBC

config ARCH_MPC8540
	bool
	select FSL_LAW
	select SYS_FSL_HAS_DDR1

config ARCH_MPC8541
	bool
	select FSL_LAW
	select SYS_FSL_HAS_DDR1
	select SYS_FSL_HAS_SEC
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_2

config ARCH_MPC8544
	bool
	select FSL_LAW
	select SYS_FSL_ERRATUM_A005125
	select SYS_FSL_HAS_DDR2
	select SYS_FSL_HAS_SEC
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_2
	select SYS_PPC_E500_USE_DEBUG_TLB
	select FSL_ELBC

config ARCH_MPC8548
	bool
	select FSL_LAW
	select SYS_FSL_ERRATUM_A005125
	select SYS_FSL_ERRATUM_NMG_DDR120
	select SYS_FSL_ERRATUM_NMG_LBC103
	select SYS_FSL_ERRATUM_NMG_ETSEC129
	select SYS_FSL_ERRATUM_I2C_A004447
	select SYS_FSL_HAS_DDR2
	select SYS_FSL_HAS_DDR1
	select SYS_FSL_HAS_SEC
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_2
	select SYS_PPC_E500_USE_DEBUG_TLB

config ARCH_MPC8555
	bool
	select FSL_LAW
	select SYS_FSL_HAS_DDR1
	select SYS_FSL_HAS_SEC
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_2

config ARCH_MPC8560
	bool
	select FSL_LAW
	select SYS_FSL_HAS_DDR1

config ARCH_MPC8568
	bool
	select FSL_LAW
	select SYS_FSL_HAS_DDR2
	select SYS_FSL_HAS_SEC
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_2

config ARCH_MPC8569
	bool
	select FSL_LAW
	select SYS_FSL_ERRATUM_A004508
	select SYS_FSL_ERRATUM_A005125
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_SEC
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_2
	select FSL_ELBC

config ARCH_MPC8572
	bool
	select FSL_LAW
	select SYS_FSL_ERRATUM_A004508
	select SYS_FSL_ERRATUM_A005125
	select SYS_FSL_ERRATUM_DDR_115
	select SYS_FSL_ERRATUM_DDR111_DDR134
	select SYS_FSL_HAS_DDR2
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_SEC
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_2
	select SYS_PPC_E500_USE_DEBUG_TLB
	select FSL_ELBC

config ARCH_P1010
	bool
	select FSL_LAW
	select SYS_FSL_ERRATUM_A004477
	select SYS_FSL_ERRATUM_A004508
	select SYS_FSL_ERRATUM_A005125
	select SYS_FSL_ERRATUM_A006261
	select SYS_FSL_ERRATUM_A007075
	select SYS_FSL_ERRATUM_ESDHC111
	select SYS_FSL_ERRATUM_I2C_A004447
	select SYS_FSL_ERRATUM_IFC_A002769
	select SYS_FSL_ERRATUM_P1010_A003549
	select SYS_FSL_ERRATUM_SEC_A003571
	select SYS_FSL_ERRATUM_IFC_A003399
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_SEC
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_4
	select SYS_PPC_E500_USE_DEBUG_TLB
	select FSL_IFC

config ARCH_P1011
	bool
	select FSL_LAW
	select SYS_FSL_ERRATUM_A004508
	select SYS_FSL_ERRATUM_A005125
	select SYS_FSL_ERRATUM_ELBC_A001
	select SYS_FSL_ERRATUM_ESDHC111
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_SEC
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_2
	select SYS_PPC_E500_USE_DEBUG_TLB
	select FSL_ELBC

config ARCH_P1020
	bool
	select FSL_LAW
	select SYS_FSL_ERRATUM_A004508
	select SYS_FSL_ERRATUM_A005125
	select SYS_FSL_ERRATUM_ELBC_A001
	select SYS_FSL_ERRATUM_ESDHC111
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_SEC
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_2
	select SYS_PPC_E500_USE_DEBUG_TLB
	select FSL_ELBC

config ARCH_P1021
	bool
	select FSL_LAW
	select SYS_FSL_ERRATUM_A004508
	select SYS_FSL_ERRATUM_A005125
	select SYS_FSL_ERRATUM_ELBC_A001
	select SYS_FSL_ERRATUM_ESDHC111
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_SEC
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_2
	select SYS_PPC_E500_USE_DEBUG_TLB
	select FSL_ELBC

config ARCH_P1022
	bool
	select FSL_LAW
	select SYS_FSL_ERRATUM_A004477
	select SYS_FSL_ERRATUM_A004508
	select SYS_FSL_ERRATUM_A005125
	select SYS_FSL_ERRATUM_ELBC_A001
	select SYS_FSL_ERRATUM_ESDHC111
	select SYS_FSL_ERRATUM_SATA_A001
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_SEC
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_2
	select SYS_PPC_E500_USE_DEBUG_TLB
	select FSL_ELBC

config ARCH_P1023
	bool
	select FSL_LAW
	select SYS_FSL_ERRATUM_A004508
	select SYS_FSL_ERRATUM_A005125
	select SYS_FSL_ERRATUM_I2C_A004447
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_SEC
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_4
	select FSL_ELBC

config ARCH_P1024
	bool
	select FSL_LAW
	select SYS_FSL_ERRATUM_A004508
	select SYS_FSL_ERRATUM_A005125
	select SYS_FSL_ERRATUM_ELBC_A001
	select SYS_FSL_ERRATUM_ESDHC111
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_SEC
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_2
	select SYS_PPC_E500_USE_DEBUG_TLB
	select FSL_ELBC

config ARCH_P1025
	bool
	select FSL_LAW
	select SYS_FSL_ERRATUM_A004508
	select SYS_FSL_ERRATUM_A005125
	select SYS_FSL_ERRATUM_ELBC_A001
	select SYS_FSL_ERRATUM_ESDHC111
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_SEC
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_2
	select SYS_PPC_E500_USE_DEBUG_TLB
	select FSL_ELBC

config ARCH_P2020
	bool
	select FSL_LAW
	select SYS_FSL_ERRATUM_A004477
	select SYS_FSL_ERRATUM_A004508
	select SYS_FSL_ERRATUM_A005125
	select SYS_FSL_ERRATUM_ESDHC111
	select SYS_FSL_ERRATUM_ESDHC_A001
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_SEC
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_2
	select SYS_PPC_E500_USE_DEBUG_TLB
	select FSL_ELBC

config ARCH_P2041
	bool
	select E500MC
	select FSL_LAW
	select SYS_FSL_ERRATUM_A004510
	select SYS_FSL_ERRATUM_A004849
	select SYS_FSL_ERRATUM_A006261
	select SYS_FSL_ERRATUM_CPU_A003999
	select SYS_FSL_ERRATUM_DDR_A003
	select SYS_FSL_ERRATUM_DDR_A003474
	select SYS_FSL_ERRATUM_ESDHC111
	select SYS_FSL_ERRATUM_I2C_A004447
	select SYS_FSL_ERRATUM_NMG_CPU_A011
	select SYS_FSL_ERRATUM_SRIO_A004034
	select SYS_FSL_ERRATUM_USB14
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_SEC
	select SYS_FSL_QORIQ_CHASSIS1
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_4
	select FSL_ELBC

config ARCH_P3041
	bool
	select E500MC
	select FSL_LAW
	select SYS_FSL_DDR_VER_44
	select SYS_FSL_ERRATUM_A004510
	select SYS_FSL_ERRATUM_A004849
	select SYS_FSL_ERRATUM_A005812
	select SYS_FSL_ERRATUM_A006261
	select SYS_FSL_ERRATUM_CPU_A003999
	select SYS_FSL_ERRATUM_DDR_A003
	select SYS_FSL_ERRATUM_DDR_A003474
	select SYS_FSL_ERRATUM_ESDHC111
	select SYS_FSL_ERRATUM_I2C_A004447
	select SYS_FSL_ERRATUM_NMG_CPU_A011
	select SYS_FSL_ERRATUM_SRIO_A004034
	select SYS_FSL_ERRATUM_USB14
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_SEC
	select SYS_FSL_QORIQ_CHASSIS1
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_4
	select FSL_ELBC

config ARCH_P4080
	bool
	select E500MC
	select FSL_LAW
	select SYS_FSL_DDR_VER_44
	select SYS_FSL_ERRATUM_A004510
	select SYS_FSL_ERRATUM_A004580
	select SYS_FSL_ERRATUM_A004849
	select SYS_FSL_ERRATUM_A005812
	select SYS_FSL_ERRATUM_A007075
	select SYS_FSL_ERRATUM_CPC_A002
	select SYS_FSL_ERRATUM_CPC_A003
	select SYS_FSL_ERRATUM_CPU_A003999
	select SYS_FSL_ERRATUM_DDR_A003
	select SYS_FSL_ERRATUM_DDR_A003474
	select SYS_FSL_ERRATUM_ELBC_A001
	select SYS_FSL_ERRATUM_ESDHC111
	select SYS_FSL_ERRATUM_ESDHC13
	select SYS_FSL_ERRATUM_ESDHC135
	select SYS_FSL_ERRATUM_I2C_A004447
	select SYS_FSL_ERRATUM_NMG_CPU_A011
	select SYS_FSL_ERRATUM_SRIO_A004034
	select SYS_P4080_ERRATUM_CPU22
	select SYS_P4080_ERRATUM_PCIE_A003
	select SYS_P4080_ERRATUM_SERDES8
	select SYS_P4080_ERRATUM_SERDES9
	select SYS_P4080_ERRATUM_SERDES_A001
	select SYS_P4080_ERRATUM_SERDES_A005
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_SEC
	select SYS_FSL_QORIQ_CHASSIS1
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_4
	select FSL_ELBC

config ARCH_P5020
	bool
	select E500MC
	select FSL_LAW
	select SYS_FSL_DDR_VER_44
	select SYS_FSL_ERRATUM_A004510
	select SYS_FSL_ERRATUM_A006261
	select SYS_FSL_ERRATUM_DDR_A003
	select SYS_FSL_ERRATUM_DDR_A003474
	select SYS_FSL_ERRATUM_ESDHC111
	select SYS_FSL_ERRATUM_I2C_A004447
	select SYS_FSL_ERRATUM_SRIO_A004034
	select SYS_FSL_ERRATUM_USB14
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_SEC
	select SYS_FSL_QORIQ_CHASSIS1
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_4
	select SYS_PPC64
	select FSL_ELBC

config ARCH_P5040
	bool
	select E500MC
	select FSL_LAW
	select SYS_FSL_DDR_VER_44
	select SYS_FSL_ERRATUM_A004510
	select SYS_FSL_ERRATUM_A004699
	select SYS_FSL_ERRATUM_A005812
	select SYS_FSL_ERRATUM_A006261
	select SYS_FSL_ERRATUM_DDR_A003
	select SYS_FSL_ERRATUM_DDR_A003474
	select SYS_FSL_ERRATUM_ESDHC111
	select SYS_FSL_ERRATUM_USB14
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_SEC
	select SYS_FSL_QORIQ_CHASSIS1
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_4
	select SYS_PPC64
	select FSL_ELBC

config ARCH_QEMU_E500
	bool

config ARCH_T1023
	bool
	select E500MC
	select FSL_LAW
	select SYS_FSL_DDR_VER_50
	select SYS_FSL_ERRATUM_A008378
	select SYS_FSL_ERRATUM_A009663
	select SYS_FSL_ERRATUM_A009942
	select SYS_FSL_ERRATUM_ESDHC111
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_DDR4
	select SYS_FSL_HAS_SEC
	select SYS_FSL_QORIQ_CHASSIS2
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_5
	select FSL_IFC

config ARCH_T1024
	bool
	select E500MC
	select FSL_LAW
	select SYS_FSL_DDR_VER_50
	select SYS_FSL_ERRATUM_A008378
	select SYS_FSL_ERRATUM_A009663
	select SYS_FSL_ERRATUM_A009942
	select SYS_FSL_ERRATUM_ESDHC111
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_DDR4
	select SYS_FSL_HAS_SEC
	select SYS_FSL_QORIQ_CHASSIS2
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_5
	select FSL_IFC

config ARCH_T1040
	bool
	select E500MC
	select FSL_LAW
	select SYS_FSL_DDR_VER_50
	select SYS_FSL_ERRATUM_A008044
	select SYS_FSL_ERRATUM_A008378
	select SYS_FSL_ERRATUM_A009663
	select SYS_FSL_ERRATUM_A009942
	select SYS_FSL_ERRATUM_ESDHC111
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_DDR4
	select SYS_FSL_HAS_SEC
	select SYS_FSL_QORIQ_CHASSIS2
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_5
	select FSL_IFC

config ARCH_T1042
	bool
	select E500MC
	select FSL_LAW
	select SYS_FSL_DDR_VER_50
	select SYS_FSL_ERRATUM_A008044
	select SYS_FSL_ERRATUM_A008378
	select SYS_FSL_ERRATUM_A009663
	select SYS_FSL_ERRATUM_A009942
	select SYS_FSL_ERRATUM_ESDHC111
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_DDR4
	select SYS_FSL_HAS_SEC
	select SYS_FSL_QORIQ_CHASSIS2
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_5
	select FSL_IFC

config ARCH_T2080
	bool
	select E500MC
	select E6500
	select FSL_LAW
	select SYS_FSL_DDR_VER_47
	select SYS_FSL_ERRATUM_A006379
	select SYS_FSL_ERRATUM_A006593
	select SYS_FSL_ERRATUM_A007186
	select SYS_FSL_ERRATUM_A007212
	select SYS_FSL_ERRATUM_A007815
	select SYS_FSL_ERRATUM_A007907
	select SYS_FSL_ERRATUM_A009942
	select SYS_FSL_ERRATUM_ESDHC111
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_SEC
	select SYS_FSL_QORIQ_CHASSIS2
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_4
	select SYS_PPC64
	select FSL_IFC

config ARCH_T2081
	bool
	select E500MC
	select E6500
	select FSL_LAW
	select SYS_FSL_DDR_VER_47
	select SYS_FSL_ERRATUM_A006379
	select SYS_FSL_ERRATUM_A006593
	select SYS_FSL_ERRATUM_A007186
	select SYS_FSL_ERRATUM_A007212
	select SYS_FSL_ERRATUM_A009942
	select SYS_FSL_ERRATUM_ESDHC111
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_SEC
	select SYS_FSL_QORIQ_CHASSIS2
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_4
	select SYS_PPC64
	select FSL_IFC

config ARCH_T4160
	bool
	select E500MC
	select E6500
	select FSL_LAW
	select SYS_FSL_DDR_VER_47
	select SYS_FSL_ERRATUM_A004468
	select SYS_FSL_ERRATUM_A005871
	select SYS_FSL_ERRATUM_A006379
	select SYS_FSL_ERRATUM_A006593
	select SYS_FSL_ERRATUM_A007186
	select SYS_FSL_ERRATUM_A007798
	select SYS_FSL_ERRATUM_A009942
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_SEC
	select SYS_FSL_QORIQ_CHASSIS2
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_4
	select SYS_PPC64
	select FSL_IFC

config ARCH_T4240
	bool
	select E500MC
	select E6500
	select FSL_LAW
	select SYS_FSL_DDR_VER_47
	select SYS_FSL_ERRATUM_A004468
	select SYS_FSL_ERRATUM_A005871
	select SYS_FSL_ERRATUM_A006261
	select SYS_FSL_ERRATUM_A006379
	select SYS_FSL_ERRATUM_A006593
	select SYS_FSL_ERRATUM_A007186
	select SYS_FSL_ERRATUM_A007798
	select SYS_FSL_ERRATUM_A007815
	select SYS_FSL_ERRATUM_A007907
	select SYS_FSL_ERRATUM_A009942
	select SYS_FSL_HAS_DDR3
	select SYS_FSL_HAS_SEC
	select SYS_FSL_QORIQ_CHASSIS2
	select SYS_FSL_SEC_BE
	select SYS_FSL_SEC_COMPAT_4
	select SYS_PPC64
	select FSL_IFC

config BOOKE
	bool
	default y

config E500
	bool
	default y
	help
		Enable PowerPC E500 cores, including e500v1, e500v2, e500mc

config E500MC
	bool
	help
		Enble PowerPC E500MC core

config E6500
	bool
	help
		Enable PowerPC E6500 core

config FSL_LAW
	bool
	help
		Use Freescale common code for Local Access Window

config SECURE_BOOT
	bool	"Secure Boot"
	help
		Enable Freescale Secure Boot feature. Normally selected
		by defconfig. If unsure, do not change.

config MAX_CPUS
	int "Maximum number of CPUs permitted for MPC85xx"
	default 12 if ARCH_T4240
	default 8 if ARCH_P4080 || \
		     ARCH_T4160