doc/README.t4240qds · 162762205fa997bf27dded8597904052571a803b · Florian Mayer / u-boot

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12 years ago

board/t4240qds, b4860qds: LAW/TLB for DCSR set to size 32M · 49e946cb

Stephen George authored 12 years ago


Debug trace buffers are memory mapped in DCSR space beyond 4M.

Signed-off-by: Stephen George <stephen.george@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

49e946cb

History

board/t4240qds, b4860qds: LAW/TLB for DCSR set to size 32M

Stephen George authored 12 years ago


Debug trace buffers are memory mapped in DCSR space beyond 4M.

Signed-off-by: Stephen George <stephen.george@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>