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Bin Meng authored
This adds QEMU RISC-V 32/64 SPL testing. Unlike QEMU RISC-V 32/64, we test SPL running in M-mode and U-Boot proper running in S-mode, with a 4-core SMP configuration. Signed-off-by:Bin Meng <bmeng.cn@gmail.com>
Bin Meng authoredThis adds QEMU RISC-V 32/64 SPL testing. Unlike QEMU RISC-V 32/64, we test SPL running in M-mode and U-Boot proper running in S-mode, with a 4-core SMP configuration. Signed-off-by:
