sunxi: Add base address for GIC

Instead of hardcoding the GIC addresses in the PSCI implementation,
provide a base address in the cpu header.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

arch/arm/cpu/armv7/sunxi/psci_sun6i.S

@@ -42,8 +42,8 @@
 
 #define	ONE_MS			(CONFIG_TIMER_CLK_FREQ / 1000)
 #define	TEN_MS			(10 * ONE_MS)
-#define	GICD_BASE		0x1c81000
-#define	GICC_BASE		0x1c82000
+#define	GICD_BASE		(SUNXI_GIC400_BASE +  0x1000)
+#define	GICC_BASE		(SUNXI_GIC400_BASE +  0x2000)
 
 .globl	psci_fiq_enter
 psci_fiq_enter:

arch/arm/cpu/armv7/sunxi/psci_sun7i.S

@@ -42,8 +42,8 @@
 
 #define	ONE_MS			(CONFIG_TIMER_CLK_FREQ / 1000)
 #define	TEN_MS			(10 * ONE_MS)
-#define	GICD_BASE		0x1c81000
-#define	GICC_BASE		0x1c82000
+#define	GICD_BASE		(SUNXI_GIC400_BASE +  0x1000)
+#define	GICC_BASE		(SUNXI_GIC400_BASE +  0x2000)
 
 .globl	psci_fiq_enter
 psci_fiq_enter:

arch/arm/include/asm/arch-sunxi/cpu_sun4i.h

@@ -143,6 +143,8 @@
 #define SUNXI_DRAM_PHY0_BASE		0x01c65000
 #define SUNXI_DRAM_PHY1_BASE		0x01c66000
 
+#define SUNXI_GIC400_BASE		0x01c80000
+
 /* module sram */
 #define SUNXI_SRAM_C_BASE		0x01d00000