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Commit 7a1ac419 authored by Haiying Wang's avatar Haiying Wang Committed by Andrew Fleming-AFLEMING
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Enable L2 cache for MPC8568MDS board 


The L2 cache size is 512KB for 8568, print out the correct informaiton.

Signed-off-by: default avatarHaiying Wang <Haiying.Wang@freescale.com>
parent 94c47fda
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