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Commit 97003756 authored by Ben Gardiner's avatar Ben Gardiner Committed by Wolfgang Denk
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da8xx: fixup ARM relocation support


Split the existing dram_init for da8xx when ARM reloc is enabled, like the
changes to arch/arm/cpu/arm926ejs/orion5x/dram.c in
0f234d263b17ccf1b8fd776eb8c15b7cdb27a887 by Heiko Schocher <hs@denx.de>.

Without these changes gd->ram_size is '0' which leads to incorrect relocation
when CONFIG_SYS_ARM_WITHOUT_RELOC is defined and the board does not boot.

We use get_ram_size to dynamically calculate the available RAM because it runs
on different board version with different ram, as suggested by Heiko in private
communication.

Tested on a da850evm with 128M of DDR2 installed; with both
CONFIG_SYS_ARM_WITHOUT_RELOC defined and undefined.

Signed-off-by: default avatarBen Gardiner <bengardiner@nanometrics.ca>
Reviewed-by: default avatarSudhakar Rajashekhara <sudhakar.raj@ti.com>
CC: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
CC: Heiko Schocher <hs@denx.de>
parent a51dd67a
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...@@ -33,6 +33,7 @@ ...@@ -33,6 +33,7 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
int dram_init(void) int dram_init(void)
{ {
gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
...@@ -40,6 +41,22 @@ int dram_init(void) ...@@ -40,6 +41,22 @@ int dram_init(void)
return(0); return(0);
} }
#else
int dram_init(void)
{
/* dram_init must store complete ramsize in gd->ram_size */
gd->ram_size = get_ram_size(
(volatile void *)CONFIG_SYS_SDRAM_BASE,
CONFIG_MAX_RAM_BANK_SIZE);
return 0;
}
void dram_init_banksize(void)
{
gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_dram[0].size = gd->ram_size;
}
#endif
#ifdef CONFIG_DRIVER_TI_EMAC #ifdef CONFIG_DRIVER_TI_EMAC
......
...@@ -47,6 +47,7 @@ ...@@ -47,6 +47,7 @@
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* reserved for initial data */ #define CONFIG_SYS_GBL_DATA_SIZE 128 /* reserved for initial data */
#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */ #define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */
#define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */ #define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */
#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/
/* memtest start addr */ /* memtest start addr */
#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000) #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000)
......
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