ARM: UniPhier: add xHCI device nodes to PH1-Pro4 device tree

Each USB port corresponds to the following IP core:
 port0: xHCI (0x65a00000) SS+HS
 port1: xHCI (0x65c00000) HS (SS PHY is not implemented)
 port2: EHCI (0x5a800100) HS
 port3: EHCI (0x5a810100) HS

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

arch/arm/dts/uniphier-ph1-pro4-ref.dts

@@ -36,6 +36,7 @@
 		i2c3 = &i2c3;
 		i2c5 = &i2c5;
 		i2c6 = &i2c6;
+		usb0 = &usb0;
 	};
 };
 
@@ -54,7 +55,3 @@
 &usb0 {
 	status = "okay";
 };
-
-&usb1 {
-	status = "okay";
-};

arch/arm/dts/uniphier-ph1-pro4.dtsi

@@ -119,18 +119,30 @@
 			status = "ok";
 		};
 
-		usb0: usb@5a800100 {
+		usb2: usb@5a800100 {
 			compatible = "panasonic,uniphier-ehci", "generic-ehci";
 			status = "disabled";
 			reg = <0x5a800100 0x100>;
 		};
 
-		usb1: usb@5a810100 {
+		usb3: usb@5a810100 {
 			compatible = "panasonic,uniphier-ehci", "generic-ehci";
 			status = "disabled";
 			reg = <0x5a810100 0x100>;
 		};
 
+		usb0: usb@65a00000 {
+			compatible = "panasonic,uniphier-xhci", "generic-xhci";
+			status = "disabled";
+			reg = <0x65a00000 0x100>;
+		};
+
+		usb1: usb@65c00000 {
+			compatible = "panasonic,uniphier-xhci", "generic-xhci";
+			status = "disabled";
+			reg = <0x65c00000 0x100>;
+		};
+
 		nand: nand@68000000 {
 			compatible = "denali,denali-nand-dt";
 			reg = <0x68000000 0x20>, <0x68100000 0x1000>;