powerpc/mpc85xx: software workaround for DDR erratum A-004468
Boot space translation utilizes the pre-translation address to select the DDR controller target. However, the post-translation address will be presented to the selected DDR controller. It is possible that the pre- translation address selects one DDR controller but the post-translation address exists in a different DDR controller when using certain DDR controller interleaving modes. The device may fail to boot under these circumstances. Note that a DDR MSE error will not be detected since DDR controller bounds registers are programmed to be the same when configured for DDR controller interleaving. Signed-off-by:York Sun <yorksun@freescale.com> Signed-off-by:
Andy Fleming <afleming@freescale.com>
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- arch/powerpc/cpu/mpc85xx/cmd_errata.c 3 additions, 0 deletionsarch/powerpc/cpu/mpc85xx/cmd_errata.c
- arch/powerpc/cpu/mpc85xx/fdt.c 1 addition, 1 deletionarch/powerpc/cpu/mpc85xx/fdt.c
- arch/powerpc/cpu/mpc85xx/mp.c 86 additions, 10 deletionsarch/powerpc/cpu/mpc85xx/mp.c
- arch/powerpc/cpu/mpc86xx/fdt.c 1 addition, 1 deletionarch/powerpc/cpu/mpc86xx/fdt.c
- arch/powerpc/cpu/mpc86xx/mp.c 6 additions, 3 deletionsarch/powerpc/cpu/mpc86xx/mp.c
- arch/powerpc/cpu/mpc8xxx/ddr/util.c 10 additions, 0 deletionsarch/powerpc/cpu/mpc8xxx/ddr/util.c
- arch/powerpc/include/asm/config_mpc85xx.h 1 addition, 0 deletionsarch/powerpc/include/asm/config_mpc85xx.h
- arch/powerpc/include/asm/mp.h 1 addition, 1 deletionarch/powerpc/include/asm/mp.h
- arch/powerpc/lib/board.c 2 additions, 2 deletionsarch/powerpc/lib/board.c
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