- Sep 19, 2016
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Tom Rini authored
Based on A13-OLinuXino, enable DFU and UMS support. Signed-off-by:
Tom Rini <trini@konsulko.com> Reviewed-by:
Hans de Goede <hdegoede@redhat.com>
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- Sep 18, 2016
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git://www.denx.de/git/u-boot-arcTom Rini authored
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Masahiro Yamada authored
Import the latest version from the Diag software. - Support LD21 SoC (including DDR chips in the package) - Per-board granule adjustment for both reference and TV boards - Misc cleanups Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Initialize the DPLL (PLL for DRAM) in SPL, and others in U-Boot proper. Split the common code into pll-base-ld20.c for easier re-use. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Now PLLs for DRAM controller are initialized in SPL, and the others in U-Boot proper. Setting up all of them in a single directory will be helpful when we want to share code between SPL and U-Boot proper. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
The PLL for the DRAM interface must be initialized in SPL, but the others can be delayed until U-Boot proper. Move them from SPL to U-Boot proper to save the precious SPL memory footprint. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Basically, this should not be configured by users. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
This is the last code in the mach-uniphier/pinctrl/ directory. Push the remaining code out to delete the directory entirely. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Use the pin-mux data in the pinctrl drivers by directly calling pinctrl_generic_set_state(). Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
This will be needed for setting up the System Bus pin-mux via the LD11/LD20 pinctrl driver. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
The NAND subsystem has not supported the Driver Model yet, but the NAND pin-mux data are already in the pinctrl drivers. Use them by calling pinctrl_generic_set_state() directly. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
These settings are nicely cared by the pinctrl driver now. Remove. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
This is enabled by default for all the supported boot modes. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Now all UniPhier SoCs support a pinctrl driver. Select (SPL_)PINCTRL since it is mandatory even for base use. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
DT-side updates to make pinctrl on sLD3 SoC really available. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Add pin-mux support for UniPhier sLD3 SoC. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
On LD4 SoC or later, the pin-mux registers are 8bit wide, while 4bit wide on sLD3 SoC. Support it for the sLD3 pinctrl driver. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Chen-Yu Tsai authored
Sinlinx SinA33 has a USB OTG port, but VBUS is controlled manually from a jumper pad. Enable OTG in gadget mode, as well as the download gadget and related functions. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Reviewed-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
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Chen-Yu Tsai authored
Sinlinx SinA33 has 1 USB host port. Enable EHCI_HCD support for it. Also enable USB mass storage support so we can access USB sticks. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Reviewed-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
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Chen-Yu Tsai authored
Sinlinx SinA33 uses PB4 for mmc0 card detect. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Reviewed-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
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Jelle van der Waa authored
The NanoPi NEO is a simple h3 board with 512MB RAM, ethernet, one usb and one usb OTG connector. Signed-off-by:
Jelle van der Waa <jelle@vdwaa.nl> Reviewed-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
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Hans de Goede authored
With sunxi-musb musb_lowlevel_init() can fail when a charger; or no cable is plugged into the otg port. To avoid leaking the struct musb allocated by musb_init_controller() on repeated musb_usb_probe() calls, we were caching its result. But musb_init_controller() does more, such as calling sunxi_musb_init() which enables the clocks. Not calling sunxi_musb_init() causes the musb controller to stop working after a "usb reset" since that calls musb_usb_remove() which disables the clocks. This commit fixes this by removing the caching of the struct returned from musb_init_controller(), it replaces this by free-ing the allocated memory in musb_usb_remove() and calling musb_usb_remove() on musb_usb_probe() errors to ensure proper cleanup. While at it also make musb_usb_probe() and musb_usb_remove() static. Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
- Sep 17, 2016
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Chen-Yu Tsai authored
The Linux kernel musb driver expects VBUS to be off while initializing musb. Having it on results in a repeating string of warnings, followed by an unusable peripheral. The peripheral is only usable after physically removing the OTG adapter, letting musb reset its state. This partially reverts commit c9f8947e ("sunxi: usb-phy: Never power off the usb ports") Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Reviewed-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
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Hans de Goede authored
When cold-booting the ldoio0/1 regulators are always off / the gpios are always at tristate. But when re-booting from android these are sometimes on. Disable them at axp_init time (iow as early as possible) to remove this difference between a cold boot and a reboot. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Acked-by:
Ian Campbell <ijc@hellion.org.uk>
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- Sep 16, 2016
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Simon Glass authored
New CONFIG options should be added via Kconfig. To help prevent new ad-hoc CONFIGs from being added, give a build error when these are detected. Signed-off-by:
Simon Glass <sjg@chromium.org> Acked-by:
Stephen Warren <swarren@nvidia.com> Tested-by:
Stephen Warren <swarren@nvidia.com>
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Simon Glass authored
Add a list of ad-hoc CONFIG options that don't use Kconfig. This can be used to check that new ones are not being added. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
Convert CONFIG_SPL_YMODEM_SUPPORT to Kconfig Move this option to Kconfig and tidy up existing uses. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
Move this option to Kconfig and tidy up existing uses. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
Move this option to Kconfig and tidy up existing uses. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
Move this option to Kconfig and tidy up existing uses. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
Move this option to Kconfig and tidy up existing uses. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
Move this option to Kconfig and tidy up existing uses. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
Move this option to Kconfig and tidy up existing uses. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
Move this option to Kconfig and tidy up existing uses. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
Move this option to Kconfig and tidy up existing uses. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
Move this option to Kconfig and tidy up existing uses. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
This option is not used. Drop it. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
Move this option to Kconfig and tidy up existing uses. Signed-off-by:
Simon Glass <sjg@chromium.org>
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