Now that we free resources in sandbox_fs_ls Coverity is letting us know
that in some cases we might leak.  So in case of error we should still
let os_dirent_free free anything that was allocated.

Fixes: 86167089 ("sandbox/fs: Free memory allocated by os_dirent_ls")
Reported-by: Coverity (CID: 153450)
Cc: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

The Atmel AT97SC3204 is also TIS compliant.
Modify the tpm_tis_lpc driver to check for the vid/did used by the
Atmel AT97SC3204 and report an appropriate description.

Signed-off-by: George McCollister <george.mccollister@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

GCC 6.2 reasonably complains about the current code:

../cmd/tpm_test.c: In function ‘do_tpmtest’:
../cmd/tpm_test.c:540:3: warning: this ‘for’ clause does not guard... [-Wmisleading-indentation]
   for (i = 0; i < argc; i++)
   ^~~
../cmd/tpm_test.c:542:4: note: ...this statement, but the latter is misleadingly indented as if it is guarded by the ‘for’
    printf("\n------\n");
    ^~~~~~

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Updated to remove C99 variable decl:
Signed-off-by: Simon Glass <sjg@chromium.org>

Offset 0x1 in the generated kwb image file is a set of flags, bit 0
enables debug output from the BootROM firmware.  Allow a DEBUG option in
the kwb configuration to request debug output from the BootROM firmware.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>

Offset 0x18 in some Marvell datasheets this field is redacted as
"reserved". This offset is actually a set of options and bits 2:0 allow
the selection of the UART baudrate.

Allow a BAUDRATE option to set the UART baudrate for any messages coming
from the BootROM firmware.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>

The main PLL frequency is 2GHz for Armada-XP and 1GHZ for Armada 375,
38x and 39x.

[ Linux commit ae142bd9976532aa5232ab0b00e621690d8bfe6a ]

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>

Make the spl_mmc_load_image() available globally, so it can be
invoked directly by SPL on extremely space-constrained systems.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>

Add new configuration option CONFIG_MMC_TINY which strips away all
memory allocation within the MMC code and code for handling multiple
cards. This allows extremely space-constrained SPL code use the MMC
framework.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>

If debug() is not used, then the whole content of debug(...) will
be removed by the preprocessor, which will result in the following
warning. This patch adds __maybe_unused annotation to fix this.

drivers/mmc/mmc.c: In function ‘mmc_init’:
drivers/mmc/mmc.c:1685:11: warning: variable ‘start’ set but not used [-Wunused-but-set-variable]
  unsigned start;

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>

Add new command that provides possibility to enable the
background operations handshake functionality
(BKOPS_EN, EXT_CSD byte [163]) on eMMC devices.

This is an optional feature of eMMCs, the setting is write-once.
The command must be explicitly taken into use with
CONFIG_CMD_BKOPS_ENABLE.

Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>

At sdhci_get_config(), there was wrong condition to check pimux
id, so this patch fixes to check proper pinmux id.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>

Without this change we see:
../arch/arm/cpu/arm926ejs/mxs/mxs.c: In function ‘print_cpuinfo’:
../arch/arm/cpu/arm926ejs/mxs/mxs.c:181:23: warning: unused variable ‘data’ [-Wunused-variable]
../arch/arm/cpu/arm926ejs/mxs/mxs.c:180:6: warning: variable ‘cpurev’ set but not used [-Wunused-but-set-variable]

So the easy solution is to disable CONFIG_DISPLAY_CPUINFO

Reviewed-by: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

In order to avoid running into the time limit, split the 32bit and 64bit
Freescale boards into separate jobs.  We could either pass
"freescale & armv8" to buildman or exclude all of the 32bit CPUs.  While
the former is shorter I fear the amount of possible escaping required
would make things less readable.

Signed-off-by: Tom Rini <trini@konsulko.com>

map_physmem should return a pointer that can be used by the CPU to
access the given memory - on MIPS simply returning the physical address
as it does prior to this patch doesn't achieve that. Instead return a
pointer to the memory within (c)kseg0, which matches up consistently
with the (c)kseg1 pointer that uncached mappings return via ioremap.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>

When calculating the region to reserve for the stack in
arch_lmb_reserve, make use of ram_top instead of adding bi_memsize to
CONFIG_SYS_SDRAM_BASE. This avoids overflow if the system has enough
memory to reach the end of the address space.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>

Add ifdef __ASSEMBLY__ around the function prototype to let cache.h
be included from assembly code.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Paul Burton <paul.burton@imgtec.com>

Enable initr_trap hook also for MIPS to install and enable
U-Boot's specific MIPS exception handlers.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Add exception handlers for generic and EJTAG exceptions. Most of
the assembly code is imported from Linux kernel and adapted to U-Boot.
The exception vector table will be reserved above the stack before
U-Boot is relocated. The exception handlers will be installed and
activated after relocation in the initr_traps hook function.

Generic exceptions are handled by showing a CPU register dump similar
to Linux kernel. For example:

malta # md 1
00000001:
Ooops:
$ 0   : 00000000 00000000 00000009 00000004
$ 4   : 8ff7e108 00000000 0000003a 00000000
$ 8   : 00000008 00000001 8ff7cd18 00000004
$12   : 00000002 00000000 00000005 0000003a
$16   : 00000004 00000040 00000001 00000001
$20   : 00000000 8fff53c0 00000008 00000004
$24   : ffffffff 8ffdea44
$28   : 90001650 8ff7cd00 00000004 8ffe6818
Hi    : 00000000
Lo    : 00000004
epc   : 8ffe6848 (text bfc28848)
ra    : 8ffe6818 (text bfc28818)
Status: 00000006
Cause : 00000410 (ExcCode 04)
BadVA : 8ff9e928
PrId  : 00019300
 ### ERROR ### Please RESET the board ###

EJTAG exceptions are checked for SDBBP and delegated to the SDBBP handler
if necessary. Otherwise the debug mode will simply be exited. The SDBBP
handler currently prints the contents of registers c0_depc and c0_debug.
This could be extended in the future to handle semi-hosting according to
the MIPS UHI specification.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Paul Burton <paul.burton@imgtec.com>
Tested-by: Paul Burton <paul.burton@imgtec.com>

In order to set own exception handlers, a table with the exception
vectors must be built in DRAM and the CPU EBase register must be
set to the base address of this table.

Reserve the space above the stack and use gd->irq_sp as storage
for the exception base address.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

Import asm-offsets.c from kernel to generate offset for struct pt_regs
needed by exception handlers.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

This adds a new Kconfig option CONFIG_MIPS_INIT_STACK_IN_SRAM which
a SoC can select if it supports some kind of SRAM. Together with
CONFIG_SYS_INIT_SP_ADDR the initial stack and global data can be
set up in that SRAM. This can be used to provide a C environment
also for lowlevel_init().

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

Move the code for setting up the initial stack and global data
to a macro to be able to use it more than once.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

Clear cp0 status while preserving implementation specific bits.
Set bits BEV and ERL as the arch specification requires after
a reset or soft-reset exception.

Extend and fix initialization of watch registers. Check if additional
watch register sets are implemented and initialize them too.

Initialize cp0 count as early as possible to get the most
accurate boot timing.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

When booting from ROM, early exceptions can't be handled
properly. Instead of busy-looping give the developer the
possibilty to examine the situation. Invoke an UHI
exception operation which can be read as unhandled exception
by a hardware debugger if one is attached. If the debugger
doesn't support UHI, the exception is read as unexpected
breakpoint.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

This adds a compile time option to include code for static
exception vectors. Static exception vectors are only needed,
when the U-Boot entry point is equal to the CPU reset exception
vector address. For instance this is the case when U-Boot is
used as ROM in Qemu or booted from parallel NOR flash. When
U-Boot is booted from RAM (e.g. loaded there by SPL), the
exception vectors need to be setup dynamically, which is done
in follow-up commits.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

Lukasz Majewski authored 8 years ago and Stefano Babic committed 8 years ago

This patch extends the imx6 clock code to enable or disable the EIM
slow clock, which in necessary when one wants to use EIM interface t
o read/write from external memory (e.g. NOR).

Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>

Christoph Fritz authored 8 years ago and Stefano Babic committed 8 years ago

This patch adds initial support for Samtec VIN|ING 2000 board.

Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Acked-by: Marek Vasut <marex@denx.de>

The catch-all job is failing due to time limits depending on factors out
of our control, so move Samsung and Rockchip boards into their own jobs
and then exclude them from the general ARM and AArch64 jobs.

Signed-off-by: Tom Rini <trini@konsulko.com>

Angus Ainslie authored 8 years ago and Stefano Babic committed 8 years ago

Enable the escpi3 nets attached to the mikroBUS slot
on the i.MX7 Sabre evalution board. Also enble the SPI flash
commands to work with the "flash click" board.

This is V2 of this patch with changes recommended by the maintainer

CC: Jagan Teki <jteki@openedev.com>

Stefan Agner authored 8 years ago and Stefano Babic committed 8 years ago

Specify standard padding for payload to 68KB. This is derived from
the maximum header size plus maximum SPL size. It matches the
already defined offset for SD/eMMC devices (69KB) too. This allows
to use the u-boot-with-spl.imx build target to generate a directly
flashable image which can be flashed using:

  dd if=u-boot-with-spl.imx of=/dev/mmcblk0 bs=512 skip=2

While the patch has been created with SD/eMMC in mind, this also
works with other boot media. The board file needs to configure the
media specific (absolute) payload offset accordingly. Especially
the IVT offset is boot media specific and can be retrieved from the
reference manual (Table 8-25. Image Vector Table Offset and Initial
Load Region Size). For NAND boot a define like this should do the
job:

 #define CONFIG_SYS_NAND_U_BOOT_OFFS (SPL_PAD_TO + 0x400)

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>

Breno Lima authored 8 years ago and Stefano Babic committed 8 years ago

UDOO Neo Board is a development board from Seco that has three models:
 - UDOO Neo Basic
 - UDOO Neo Basic Kick Starter
 - UDOO Neo Extended
 - UDOO Neo Full

All versions are based on the i.MX6 SoloX processor.

For more details about the UDOO Neo board, please refer to:
http://www.udoo.org/udoo-neo/

This work is based on a previous commit of Francesco Montefoschi
<francesco.monte@gmail.com>:
https://github.com/fmntf/u-boot/commit/877b71184a5105e708024f232d36aed574961844



Only tested on the UDOO Neo Full board.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>

Sanchayan Maity authored 8 years ago and Stefano Babic committed 8 years ago

Our update scripts write the kernel and device tree in seperate
UBI volumes. This allows to use a lot less UBI/UBIFS support in
U-Boot, which should lower the risk of hitting bugs in this area.

Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>

Sebastien Bourdelin authored 8 years ago and Stefano Babic committed 8 years ago

This commit adds basic support including:
MMC, Serial console

Signed-off-by: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>

Ken Lin authored 8 years ago and Stefano Babic committed 8 years ago

Change the PMIC bulk configuration from auto mode to sync mode to avoid
voltage dropout issue seen in auto mode.

Signed-off-by: Ken Lin <ken.lin@advantech.com.tw>
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>

Eric Nelson authored 8 years ago and Stefano Babic committed 8 years ago

The DDR calibration routines are gated by conditionals for the
i.MX6DQ SOCs, but with the use of the sysinfo parameter, these
are usable on at least i.MX6SDL and i.MX6SL variants with DDR3.

Also, since only the Novena board currently uses the dynamic
DDR calibration routines, these routines waste space on other
boards using SPL.

Add a KConfig entry to allow boards to selectively include the
DDR calibration routines.

Signed-off-by: Eric Nelson <eric@nelint.com>