These files only need error number macros.  Actually, IS_ERR(),
PTR_ERR(), ERR_PTR(), etc. are not useful for U-Boot.  Avoid
unnecessary header includes.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

The ddrphy_shift_rof_hws() never writes back the shifted delay value
to the register, which makes this function non-effective.

Signed-off-by: Kotaro Hayashi <hayashi.kotaro@socionext.com>
[masahiro: add git log]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Change bnk_typ's value from 8 to 0 (for G1's performance).

Signed-off-by: Wataru Okoshi <okoshi.wataru@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Merge init-*.c into a single file using a table of callbacks because
the initialization flow is almost common among SoCs.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Just a cosmetic cleanup.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Introduce run-time DDR PHY training.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Add the LD11 SoC data and adjuts the printf() format because this is
a 64-bit SoC.  Otherwise, 16-digits pointer addresses would break
the log format.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Do not hard-code the number of DX blocks because it is a different
value for LD11 SoC.

Move the macro NR_DATX8_PER_DDRPHY to ddrphy-training.c since it
is the last user.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

The DDR PHY register view of LD11 is slightly different from that
of LD4/Pro4/sLD8, but it will be possible to share the register
macros (and I want to re-use as much code as possible).  Change
the code in the more flexible form.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

The status register should be polled.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

This PHY might be used for other SoCs in the future.
Avoid including the SoC name in the header name.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

  - Constify UMC setting data arrays
  - Merge data arrays *_d0 and *_d1.
  - Add PHY parameters for LD20 C1 board

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

- Do not reference CONFIG_DDR_FREQ; now the DDR frequency
    is passed from the uniphier_board_data structure
  - Constify parameter arrays
  - Tidy up cluttered macros
  - Lots of code cleanups
  - Lots of coding style fixes

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Import the latest version from the Diag software.

  - Support LD21 SoC (including DDR chips in the package)
  - Per-board granule adjustment for both reference and TV boards
  - Misc cleanups

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Most of them are my mistakes.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

I need to add more board attributes, so the "flags" member will be
handier than separate boolean ones.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

This does not have much impact on behavior, but makes code look more
more like Linux.  The use of devm_ioremap() often helps to delete
.remove callbacks entirely.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

This is a low-cost ARMv8 SoC from Socionext Inc.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Correct some register names.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

This header will be shared between PH1-LD11 and PH1-LD20
(and hopefully new ARMv8 SoCs developed in the future),
so umc64-regs.h would be a better fit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

This is the first ARMv8 SoC from Socionext Inc.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Eliminate the "ph1"_ prefixes from function names because "uniphier_"
describes the SoC familiy better.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

The ifdef conditionals in header files prevent us from multi-SoC
support in a single U-Boot image.  Detect SoC specific parameters
run-time rather than define them statically with an ifdef in
ddrphy-regs.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

The current CONFIG names like "CONFIG_ARCH_UNIPHIER_PH1_PRO4" is too
long.  It would not hurt to drop "PH1_" because "UNIPHIER_" already
well specifies the SoC family.  Also, rename files for consistency.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

The build fails if compiled with CONFIG_CMD_DDRMPHY_DUMP=y since commit
46abfcc9 ("ARM: uniphier: rework struct uniphier_board_data").

Fixes: 46abfcc9 ("ARM: uniphier: rework struct uniphier_board_data")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Rename the variable that contains the base address for consistency.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

These macros are no longer used.  These base addresses are
SoC-dependent, so they should not be placed in the header.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Currently, DRAM size is converted twice:
  size in byte -> size in Gbit -> enum

Optimize the code by converting the "size in byte" into enum directly.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Now this code can be re-written with a "for" statement instead of
calling the same function multiple times.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Now this code can be re-written with a "for" statement instead of
calling the same function multiple times.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Now this code can be re-written with a "for" statement instead of
calling the same function multiple times.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Move frequency-dependent register settings to arrays for clean-up.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Support DDR3-1600 / 512MB DDR size.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Move frequency-dependent register settings to arrays for clean-up.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

The if-else statements for the frequency-dependent register settings
seem clumsy.  Moving them to arrays would make it cleaner.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

The DDR PHY settings no longer depend on the DRAM size.  Drop the
argument from the init function.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Now these three are almost the same.  The only difference is the DTPR1
register dependency on the DRAM size, but it can be ignored.  (It has
already been ignored in PH1-sLD8 and PH1-Pro4.)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Add a field to distinguish DDR3+ from (standard) DDR3.  It also
allows to delete CONFIG_DDR_STANDARD (this is not a software
configuration, but a board attribute).

Default DDR3 spec for each SoC:

  PH1-LD4, PH1-sLD8: DDR3+
  Others: DDR3

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

These settings control the clocks around the memory controller.
The debug ability is unneeded once it works properly.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>