- Mar 06, 2009
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Heiko Schocher authored
old code implemented the QE_ENET10 errata only for Silicon Revision 2.0. New code reads now the Silicon Revision register and sets dependend on the Silicon Revision the values as advised in the QE_ENET10 errata. Signed-off-by:
Heiko Schocher <hs@denx.de> Signed-off-by:
Kim Phillips <kim.phillips@freescale.com>
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Heiko Schocher authored
- HRCW update HRCWH_BOOTSEQ_DISABLE not HRCWH_BOOTSEQ_NORMAL HRCWH_LALE_EARLY added - DDR-SDRAM settings modified. This solves sporadically problems with this memory. - CS1 now 128 MB window size - CS3 now 512 MB window size - PRAM activated - MTDPARTS_DEFAULT defined - CONFIG_HOSTNAME added - MONITOR_LEN now 384 KB Signed-off-by:
Heiko Schocher <hs@denx.de> Signed-off-by:
Kim Phillips <kim.phillips@freescale.com>
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Heiko Schocher authored
it is possible that some board variants have different DDR II RAM sizes. So we autodetect the size of the assembled RAM. Signed-off-by:
Heiko Schocher <hs@denx.de> Signed-off-by:
Kim Phillips <kim.phillips@freescale.com>
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Heiko Schocher authored
This patch adds I2C mux support for the fsl_i2c driver. This allows you to add "new" i2c busses, which are reached over i2c muxes. For more infos, please look in the README and search for CONFIG_I2C_MUX. Signed-off-by:
Heiko Schocher <hs@denx.de> Signed-off-by:
Kim Phillips <kim.phillips@freescale.com>
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Heiko Schocher authored
This patch adds I2C support for the Keymile kmeter1 board. It uses the First I2C Controller from the CPU, for accessing 4 temperature sensors, an eeprom with IVM data and the booteeprom over a pca9547 mux. Signed-off-by:
Heiko Schocher <hs@denx.de> Signed-off-by:
Kim Phillips <kim.phillips@freescale.com>
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Heiko Schocher authored
In case where a board not uses CONFIG_POST, it is not necessary to init the DTTs when running from flash. Signed-off-by:
Heiko Schocher <hs@denx.de> Signed-off-by:
Kim Phillips <kim.phillips@freescale.com>
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Dave Liu authored
1. RD_TO_PRE missed to add the AL, and need min 2 clocks for tRTP according to DDR2 JEDEC spec. 2. WRTORD - tWTR need min 2 clocks according to DDR2 JEDEC spec. 3. add the support of DDR2-533,667,800 DIMMs 4. cpo 5. make the AL to min to gain better performance. The Micron MT9HTF6472CHY-667D1 DIMMs test passed on MPC837xEMDS platform at 266MHz/333MHz/400MHz data rate. items 1, 2 and 5: Acked-by:
Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Reported-by:
Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Signed-off-by:
Dave Liu <daveliu@freescale.com> Signed-off-by:
Kim Phillips <kim.phillips@freescale.com>
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Valeriy Glushkov authored
The previous version rebooted forever with DDR bigger than 256MB. Access the DS1339 RTC chip is on I2C1 bus. Allow DHCP. Signed-off-by:
Valeriy Glushkov <gvv@lstec.com> Signed-off-by:
Kim Phillips <kim.phillips@freescale.com>
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Anton Vorontsov authored
The SerDes initialization should be finished before negating the reset signal according to the reference manual. This isn't an issue on real hardware, but we'd better stick to the specifications anyway. Suggested-by:
Liu Dave <DaveLiu@freescale.com> Signed-off-by:
Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by:
Kim Phillips <kim.phillips@freescale.com>
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- Feb 23, 2009
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Anton Vorontsov authored
On MPC8377E-RDB and MPC8378E-RDB boards we have PCIe and mini-PCIe slots. Let's support them. Signed-off-by:
Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by:
Kim Phillips <kim.phillips@freescale.com>
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Anton Vorontsov authored
We should use pci_last_busno() in pci_init_bus(), otherwise we'll erroneously re-use PCI0's first_busno for PCI1 hoses. NOTE: The patch is untested. All MPC83xx FSL boards I have have PCI1 in miniPCI form, for which I don't have any cards handy. But looking in cpu/mpc85xx/pci.c: ... #ifdef CONFIG_MPC85XX_PCI2 hose = &pci_hose[1]; hose->first_busno = pci_hose[0].last_busno + 1; And considering that we do the same for MPC83xx PCI-E support, I think this patch is correct. Signed-off-by:
Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by:
Kim Phillips <kim.phillips@freescale.com>
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Anton Vorontsov authored
This patch fixes copy-paste issue: pci_hose[0]'s first and last busnos were used to fixup pci1's nodes. We don't see this bug triggering only because Linux reenumerate buses anyway. Signed-off-by:
Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by:
Kim Phillips <kim.phillips@freescale.com>
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Anton Vorontsov authored
This patch fixes an issue in config space read accessors: we should fill-in the value even if we fail (e.g. skipping devices), otherwise CONFIG_PCI_SCAN_SHOW reports bogus values during boot up. Signed-off-by:
Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by:
Kim Phillips <kim.phillips@freescale.com>
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Anton Vorontsov authored
Currently we assign first_busno = 0 for the first PCIe hose, but this scheme won't work if we have ordinary PCI hose already registered (its first_busno value is 0 too). The old code worked fine only because we have PCI disabled on MPC837XEMDS boards in stand-alone mode (see commit 00f7bbae "mpc83xx: fix PCI scan hang on the standalone MPC837xE-MDS boards"). But on MPC837XERDB boards we have PCI and PCIe, so the bug actually triggers. So, to fix the issue, we should use pci_last_busno() + 1 for the first_busno (i.e. last available busno). Reported-by:
Huang Changming <Chang-Ming.Huang@freescale.com> Signed-off-by:
Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by:
Kim Phillips <kim.phillips@freescale.com>
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Anton Vorontsov authored
This is just a handy routine that reports last PCI busno: we walk down all the hoses and return last hose's last_busno. Will be used by PCI/PCIe initialization code. Signed-off-by:
Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by:
Kim Phillips <kim.phillips@freescale.com>
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git://git.denx.de/u-bootKim Phillips authored
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- Feb 22, 2009
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Wolfgang Denk authored
Signed-off-by:
Wolfgang Denk <wd@denx.de>
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Wolfgang Denk authored
The file was generated from building versatile_defconfig. Signed-off-by:
Wolfgang Denk <wd@denx.de>
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Wolfgang Denk authored
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Wolfgang Denk authored
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Shinya Kuribayashi authored
Compiling dbau1x00 and gth2 boards with GCC-4.2, you would see new warnings like this: skuribay@ubuntu:u-boot.git$ ./MAKEALL dbau1000 Configuring for dbau1x00 board... au1x00_eth.c: In function 'au1x00_send': au1x00_eth.c:158: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type au1x00_eth.c: In function 'au1x00_recv': au1x00_eth.c:211: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type au1x00_eth.c: In function 'au1x00_init': au1x00_eth.c:252: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type au1x00_eth.c: In function 'au1x00_recv': au1x00_eth.c:211: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type au1x00_eth.c: In function 'au1x00_init': au1x00_eth.c:252: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type au1x00_eth.c: In function 'au1x00_send': au1x00_eth.c:158: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type We're passing a volatile pointer to a function which is expecting a non- volatile pointer. That's potentially dangerous, so gcc warns about it. Confirmed with ELDK 4.2 (GCC 4.2.2) and Sourcey G++ 4.2 (GCC 4.2.3). To fix this, we add a volatile attribute to the argument in question. The virt_to_phys function in Linux kernel also does the same thing. Signed-off-by:
Stefan Roese <sr@denx.de> Signed-off-by:
Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
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Dirk Behme authored
Clean up OMAP3 MMC code: * Convert register access to struct & readx/writex style * Replace hardcode values by macros * Remove macro defined twice Signed-off-by:
Dirk Behme <dirk.behme@googlemail.com>
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Dirk Behme authored
Clock pin must have input enabled for MMC3 to work. Also enable pull-ups for cmd/data lines to be consistent with remaining MMC host pin setup. Signed-off-by:
Grazvydas Ignotas <notasas@gmail.com>
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Dirk Behme authored
This patch adds OMAP3 cpu type auto detection based on OMAP3 register and removes hardcoded values. Signed-off-by:
Steve Sakoman <sakoman@gmail.com> Signed-off-by:
Dirk Behme <dirk.behme@googlemail.com>
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Dirk Behme authored
With BeagleBoard revision C some HW changes are introduced (e.g. PinMUX) which might need different software handling. For this, GPIO pin 171 (GPIO module 6, offset 11) can be used to check for board revision. If this pin is low, we have a rev C board. Else it must be a revision Ax or Bx board. To handle board differences you can call function beagle_get_revision(). E.g.: if (beagle_get_revision()) { /* do special revision C stuff here */ } Signed-off-by:
Dirk Behme <dirk.behme@googlemail.com>
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Dirk Behme authored
* Make Overo GPIO114 an input for touchscreen PENDOWN * Make Overo GPIO144-147 readable * Make Overo EHCI pinmux match beagle rev c setup * Adjust pinmux for SMSC911X network chip support * Remove unnecessary GPIO setup * Fix merge error in Makefile Signed-off-by:
Steve Sakoman <sakoman@gmail.com> Signed-off-by:
Dirk Behme <dirk.behme@googlemail.com>
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Jean-Christophe PLAGNIOL-VILLARD authored
Signed-off-by:
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Jean-Christophe PLAGNIOL-VILLARD authored
Signed-off-by:
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Jean-Christophe PLAGNIOL-VILLARD authored
Signed-off-by:
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Jean-Christophe PLAGNIOL-VILLARD authored
Serial driver via the EmbeddedICE macrocell's DCC channel using co-processor 14. It does include a timeout to ensure that the system does not totally freeze when there is nothing connected to read. Signed-off-by:
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Hugo Villeneuve authored
Taken all the duplicated code for enabling common modules and apply software workarounds from the board specific code into common functions. Also added comments explaining the workarounds (from TI errata documents) and replaced some numerical bit numbers with more meaningful defines. Signed-off-by:
Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
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Alessandro Rubini authored
This trivially enables Ethernet support in the debug board by setting up the proper chip select. Signed-off-by:
Alessandro Rubini <rubini@unipv.it> Acked-by:
Andrea Gallo <andrea.gallo@stnwireless.com>
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Alessandro Rubini authored
This driver implements the ECC algorithm described in the CPU data sheet and uses the OOB layout chosen in already-released development systems (shipped with a custom-made u-boot 1.3.1). Signed-off-by:
Alessandro Rubini <rubini@unipv.it> Acked-by:
Andrea Gallo <andrea.gallo@stnwireless.com>
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Alessandro Rubini authored
Signed-off-by:
Alessandro Rubini <rubini@unipv.it> Acked-by:
Andrea Gallo <andrea.gallo@stnwireless.com>
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Yoshihiro Shimoda authored
Fix the problem that cannot use external hub, because this driver did not control correctly a DEVADDx register. Signed-off-by:
Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by:
Remy Bohmer <linux@bohmer.net>
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Mike Frysinger authored
Looks like the initcode updates fell out of order during my merges. The patch that really fixes up this code is part of power-on overhaul and so is too large for merging at this point. Instead, we can disable the code as no currently in-tree board depends on it. The next merge window will fix things up properly. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
The previous merge for cleaning up the I2C driver incorrectly reverted the CFG_xxx rename for some of the I2C defines. Signed-off-by:
Mike Frysinger <vapier@gentoo.org> Signed-off-by:
Heiko Schocher <hs@denx.de>
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