Sven Ebenfeld authored 8 years ago and Stefano Babic committed 8 years ago

To being able to sign created binaries, we need to know the HAB Blocks
for that image. Especially for the imximage type the HAB Blocks are
only available during creation of the image. We want to preserve the
information until we get to sign the files.
In the verbose case we still get them printed out instead of writing
to log files.

Cc: sbabic@denx.de

v2-Changes:
 - No usage of MKIMAGEOUTPUT_$(@F) macro.
 - Predefine default value /dev/null in every involved Makefile.

Signed-off-by: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Reviewed-by: George McCollister <george.mccollister@gmail.com>
Tested-by: George McCollister <george.mccollister@gmail.com>

Sven Ebenfeld authored 8 years ago and Stefano Babic committed 8 years ago

When using HAB as secure boot mechanism on Wandboard, the chain of
trust breaks immediately after the SPL. As this is not checking
the authenticity of the loaded image before jumping to it.

The HAB status output will not be implemented in SPL as it adds
a lot of strings that are only required in debug cases. With those
it exceeds the maximum size of the available OCRAM (69 KiB).

The SPL MISC driver support must be enabled, so that the driver can use OTP fuse
to check if HAB is enabled.

Cc: sbabic@denx.de

v2-Changes: None

Signed-off-by: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Reviewed-by: George McCollister <george.mccollister@gmail.com>
Tested-by: George McCollister <george.mccollister@gmail.com>

Sven Ebenfeld authored 8 years ago and Stefano Babic committed 8 years ago

These files are blowing up the SPL and should not be required
there as the SPL delivers no command console. Because building fails
for mx27 and mx31 machines with SPL build, we remove the linker flag
for them from the Makefile. Nothing is built for them to be linked
in that directory.

Cc: sbabic@denx.de

v2 Changes:
 - Remove mx27 and mx31 from Makefile during SPL build as nothing is built for
   them in that directory. And removing the commands with the libs-y directive
   lead to linker failures. e.g. "armv5te-ld.bfd: cannot find arch/arm/imx-common/built-in.o: No such file or directory)"

Signed-off-by: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Reviewed-by: George McCollister <george.mccollister@gmail.com>
Tested-by: George McCollister <george.mccollister@gmail.com>

While I moved the options, I also renamed them so that they are all
prefixed with MMC_SDHCI_.

This commit was created in the following steps.

[1] Rename with the following command
find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \
-type f -print | xargs sed -i -e '
s/CONFIG_MMC_SDMA/CONFIG_MMC_SDHCI_SDMA/g
s/CONFIG_BCM2835_SDHCI/CONFIG_MMC_SDHCI_BCM2835/g
s/CONFIG_KONA_SDHCI/CONFIG_MMC_SDHCI_KONA/g
s/CONFIG_MV_SDHCI/CONFIG_MMC_SDHCI_MV/g
s/CONFIG_S5P_SDHCI/CONFIG_MMC_SDHCI_S5P/g
s/CONFIG_SPEAR_SDHCI/CONFIG_MMC_SDHCI_SPEAR/g
'

[2] create the Kconfig entries in drivers/mmc/Kconfig

[3] Move the options by the following command
tools/moveconfig.py -y MMC_SDHCI_SDMA MMC_SDHCI_BCM2835 \
MMC_SDHCI_KONA MMC_SDHCI_MV MMC_SDHCI_S5P MMC_SDHCI_SPEAR

[4] Sort drivers/mmc/Makefile for readability

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

I am not longer using my old email address
"ajay.bhargav@einfochips.com". For U-Boot development email address is
now updated to contact@8051projects.net

Signed-off-by: Ajay Bhargav <contact@8051projects.net>

Commit be72591b ("Kconfig: Move USE_ARCH_MEMCPY/MEMSET to
Kconfig") is misconversion.

The original logic in include/configs/uniphier.h was as follows:

  #if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_ARM64)
  #define CONFIG_USE_ARCH_MEMSET
  #define CONFIG_USE_ARCH_MEMCPY
  #endif

This means those configs were enabled when building U-Boot proper,
but disabled when building SPL.  Likewise for Tegra.

Now "depends on !SPL" prevents any boards with SPL support
from reaching these options.  This changed the behavior for
UniPhier and Tegra SoC family.

Please notice these two options only control the U-Boot proper
build.  As you see arch/arm/Makefile, ARM-specific memset/memcpy
are never compiled for SPL.  So, __HAVE_ARCH_MEMCPY/MEMSET should
not set for SPL.

Fixes: be72591b ("Kconfig: Move USE_ARCH_MEMCPY/MEMSET to Kconfig")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>

To use driver-model adds the pmic node for max8998.
This is used as kerel device-tree in Linux.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

Fix the MMU mapping for A8K device family:
 - Separate A7K and A8K memory mappings
 - Fix memory regions by including IO mapping for all
   3 PCIe interfaces existing on each connected CP110 controller
Add A8K memory mapping documentation with all regions
configured by Marvell ATF.

Change-Id: I9c930569b1853900f5fba2d5db319b092cc7a2a6
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>

H3 SID controller has some bug, which makes the initial SID value at
SUNXI_SID_BASE wrong when boot.

Change the SID retrieve code to call the SID Controller directly on H3,
which can get the correct value, and also fix the SID value at
SUNXI_SID_BASE, so that it can be used by further operations.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>

Sync with Linux kernel.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

boot.bin file is generated only when SPL is selected.
Reflect this depency in Kconfig.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

This patch also includes ARM64 zynqmp changes:
- Remove platform non DM initialization
- Remove hardcoded sata base address

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

By adding labels to the cpu nodes in the dtsi, a dts that
includes it can change the OPPs by referencing the cpu0
through the label.

[Based on linux (400b6a0cbef55d1ae32808eaa1ef1c28820bf6ac)]
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: u-boot@lists.denx.de
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Move sunxi boards to use binman. This involves adding the image definition
to the device tree and using it in the Makefile.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

With the new device-tree rules it is possible to put device-tree changes
needed by U-Boot into their own file. As an example of this approach, move
Tegra over to use it.

Signed-off-by: Simon Glass <sjg@chromium.org>

Shuffle the macros around a little to remove the following warning
when building for i.MX28:

arch/arm/cpu/arm926ejs/mxs/spl_boot.c:44:26: warning: ‘iomux_boot’ defined but not used [-Wunused-const-variable=]
 static const iomux_cfg_t iomux_boot[] = {
                          ^~~~~~~~~~

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Stefano Babic <sbabic@denx.de>

Jagan Teki authored 8 years ago and Stefano Babic committed 8 years ago

Add FEC support for Engicam i.CoreM6 RQS modules.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

Jagan Teki authored 8 years ago and Stefano Babic committed 8 years ago

Add FEC node for Engicam i.CoreM6 RQS modules.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

Jagan Teki authored 8 years ago and Stefano Babic committed 8 years ago

Add FEC support for Engicam GEAM6UL module.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

Jagan Teki authored 8 years ago and Stefano Babic committed 8 years ago

Add FEC node for Engicam GEAM6UL module.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

Jagan Teki authored 8 years ago and Stefano Babic committed 8 years ago

Add I2C support for Engicam i.CoreM6 RQS modules.

icorem6qdl-rqs> i2c bus
Bus 0:  i2c@021a0000
Bus 1:  i2c@021a4000
Bus 2:  i2c@021a8000
icorem6qdl-rqs> i2c dev 0
Setting bus to 0
icorem6qdl-rqs> i2c speed 100000
Setting bus speed to 100000 Hz
icorem6qdl-rqs> i2c probe
Valid chip addresses: 4F
icorem6qdl-rqs> i2c md 4F 0xff
00ff: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................
icorem6qdl-rqs> i2c bus
Bus 0:  i2c@021a0000  (active 0)
   4f: generic_4f, offset len 1, flags 0
Bus 1:  i2c@021a4000
Bus 2:  i2c@021a8000

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

Jagan Teki authored 8 years ago and Stefano Babic committed 8 years ago

Add I2C nodes for Engicam i.CoreM6 RQS modules.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

Jagan Teki authored 8 years ago and Stefano Babic committed 8 years ago

Boot from MMC:
-------------
U-Boot SPL 2016.11-rc2-g217bd8e-dirty (Nov 08 2016 - 22:56:07)
Trying to boot from MMC1

U-Boot 2016.11-rc2-g217bd8e-dirty (Nov 08 2016 - 22:56:07 +0530)

CPU:   Freescale i.MX6DL rev1.3 at 792 MHz
Reset cause: POR
Model: Engicam i.CoreM6 DualLite/Solo RQS Starter Kit
DRAM:  512 MiB
MMC:   FSL_SDHC: 0
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot:  0
icorem6qdl-rqs>

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

Jagan Teki authored 8 years ago and Stefano Babic committed 8 years ago

Boot from MMC:
-------------
U-Boot SPL 2016.11-rc2-g217bd8e-dirty (Nov 08 2016 - 22:59:44)
Trying to boot from MMC1

U-Boot 2016.11-rc2-g217bd8e-dirty (Nov 08 2016 - 22:59:44 +0530)

CPU:   Freescale i.MX6D rev1.2 at 792 MHz
Reset cause: POR
Model: Engicam i.CoreM6 Quad/Dual RQS Starter Kit
DRAM:  512 MiB
MMC:   FSL_SDHC: 0
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot:  0
icorem6qdl-rqs>

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

Jagan Teki authored 8 years ago and Stefano Babic committed 8 years ago

Add I2C support for Engicam GEAM6UL module.

geam6ul> i2c bus
Bus 0:  i2c@021a0000
Bus 1:  i2c@021a4000
geam6ul> i2c dev 0
Setting bus to 0
geam6ul> i2c dev
Current bus is 0
geam6ul> i2c speed 100000
Setting bus speed to 100000 Hz
geam6ul> i2c probe
Valid chip addresses: 2C
geam6ul> i2c md 2C 0xff
00ff: 00 00 00 00 0f f0 01 64 ff ff 00 00 00 00 00 00    .......d........

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

Jagan Teki authored 8 years ago and Stefano Babic committed 8 years ago

Add I2C nodes for Engicam GEAM6UL module.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

Jagan Teki authored 8 years ago and Stefano Babic committed 8 years ago

Boot Log:
--------
U-Boot SPL 2016.11-rc2-00144-g922adaa-dirty (Oct 28 2016 - 18:55:30)
Trying to boot from MMC1

U-Boot 2016.11-rc2-00144-g922adaa-dirty (Oct 28 2016 - 18:55:30 +0530)

CPU:   Freescale i.MX6UL rev1.1 528 MHz (running at 396 MHz)
CPU:   Industrial temperature grade (-40C to 105C) at 43C
Reset cause: POR
Model: Engicam GEAM6UL
DRAM:  128 MiB
MMC:   FSL_SDHC: 0
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot:  0
geam6ul>

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

Jagan Teki authored 8 years ago and Stefano Babic committed 8 years ago

Add i.MX6UL dtsi support from Linux.

Here is the last commit:
"ARM: dts: add gpio-ranges property to iMX GPIO controllers"
(sha1: bb728d662bed0fe91b152550e640cb3f6caa972c)

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

Jagan Teki authored 8 years ago and Stefano Babic committed 8 years ago

Add I2C support for Engicam i.CoreM6 qdl board.

icorem6qdl> i2c bus
Bus 0:  i2c@021a0000
Bus 1:  i2c@021a4000
Bus 2:  i2c@021a8000
icorem6qdl> i2c dev 2
Setting bus to 2
icorem6qdl> i2c speed 100000
Setting bus speed to 100000 Hz
icorem6qdl> i2c probe
Valid chip addresses: 2C
icorem6qdl> i2c md 2C 0xff
00ff: 00 00 00 00 0f f0 01 64 ff ff 00 00 00 00 00 00    .......d........

Cc: Stefano Babic <sbabic@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Heiko Schocher <hs@denx.de>

Jagan Teki authored 8 years ago and Stefano Babic committed 8 years ago

Use CONFIG_DM_ETH and remove board_eth_init code
from board files.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

Jagan Teki authored 8 years ago and Stefano Babic committed 8 years ago

Add FEC dts support for Engicam i.CoreM6 dql modules.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

Move USE_ARCH_MEMCPY/MEMSET options to Kconfig.

Make it "default y" for the ARMv7 architecture and make it
depend on !ARM64 && !SPL.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>

Patrick Bruenn authored 8 years ago and Stefano Babic committed 8 years ago

Add CX9020 board based on mx53loco.
Add simplified imx53 base device tree from kernel v4.8-rc8, to reuse
serial_mxc with DTE and prepare for device tree migration of other
functions and imx53 devices.

The CX9020 differs from i.MX53 Quick Start Board by:
- use uart2 instead of uart1
- DVI-D connector instead of VGA
- no audio
- CCAT FPGA connected to emi
- enable rtc

Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>

Peng Fan authored 8 years ago and Stefano Babic committed 8 years ago

Add i.MX6SLL EVK board support.
1. Add imx6sll-evk device tree.
2. Enable SDHC/I2C/UART.
3. Enable REGULATOR/PMIC/I2C/GPIO/SDHC/PINCTRL driver.

Boot Log:
U-Boot 2016.11-00127-gc635871-dirty (Nov 24 2016 - 13:28:19 +0800)

CPU:   Freescale i.MX6SLL rev1.0 at 792MHz
CPU:   Commercial temperature grade (0C to 95C)Reset cause: POR
Model: Freescale i.MX6SLL EVK Board
Board: MX6SLL EVK
DRAM:  2 GiB
i2c bus 0 at 35258368, no gpio pinctrl state.
PMIC: PFUZE100! DEV_ID=0x10 REV_ID=0x21
MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
In:    serial
Out:   serial
Err:   serial
Net:   CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot:  0

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

Peng Fan authored 8 years ago and Stefano Babic committed 8 years ago

Add i.MX6SLL device tree.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

Peng Fan authored 8 years ago and Stefano Babic committed 8 years ago

Update lcdif regs for i.MX6SL/SLL

Signed-off-by: Ye.Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>

Peng Fan authored 8 years ago and Stefano Babic committed 8 years ago

add Kconfig entry for i.MX6SLL

Signed-off-by: Peng Fan <peng.fan@nxp.com>

Peng Fan authored 8 years ago and Stefano Babic committed 8 years ago

If L2 cache configured as OCRAM, reset it.
Switch to use runtime check.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

Peng Fan authored 8 years ago and Stefano Babic committed 8 years ago

Add clock support for i.MX6SLL.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

Peng Fan authored 8 years ago and Stefano Babic committed 8 years ago

The LCDIF Pixel clock mux is not glitchless, so need
to gate before changing mux.

Also change enable_lcdif_clock prototype with a new input
parameter to indicate disable or enable.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>