Commit 445a7b38 introduced the following
compile warnings:

cmd_i2c.c:112: warning: missing braces around initializer
cmd_i2c.c:112: warning: (near initialization for 'i2c_no_probes[0]')

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

Measurements with our MPC8544 board showed that the I2C bus frequency
is wrong by a factor of 1.5. Obviously, the interpretation of the
MPC85xx_PORDEVSR2_SEC_CFG bit of the cfg_sec_freq register is not
correct. There seems to be an error in the 8544 RM.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>

get_cpu_board_revision() returned board revision based on information stored
in global static struct eeprom. It should instead use one from local struct
board_eeprom, to which the data is actually read from EEPROM. The bug led to
system hang after printing L1 cache information on U-Boot startup. The problem
was observed on MPC8555CDS system and possibly affects other Freescale MPC85xx
boards using CFG_I2C_EEPROM_CCID.

The change has been successfully tested on MPC8555CDS system.

Signed-off-by: Rafal Czubak <rcz@semihalf.com>

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>

The ID EEPROM on MPC8572DS board locates on I2C bus 1. Its the storage for
system information like mac addresses etc. This patch enables it.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>

MPC8572DS has two i2c buses. This patch moves the DDR SPD_EEPROM to i2c bus 1
according to the board spec, and adds the 2nd i2c bus offset.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>

On 8536DS board, When the DDR clk is set async mode(SW3[6:8] != 111),
The display is still sync mode DDR freq. This patch try to fix
this. The display DDR freq is now the actual freq in both
sync and async mode.

Signed-off-by: Jason Jin <Jason.jin@freescale.com>

ePAPR says if the *cache-block-size is the same as *cache-line-size
than we don't need the *cache-line-size property.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

The CFI flash driver starts at flash_init() which calls down into
flash_get_size().  This starts by calling flash_detect_cfi().  If said
function fails, flash_get_size() finishes by attempting to reset the
flash.  Unfortunately, it does this with an info->portwidth set to 0x10
which filters down into flash_make_cmd() and that happily smashes the
stack by sticking info->portwidth bytes into a cfiword_t variable that
lives on the stack.  On a 64bit system you probably won't notice, but
killing the last 8 bytes on a 32bit system usually leads to a corrupt
return address.  Which is what happens on a Blackfin system.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Stefan Roese <sr@denx.de>

bootdelay set to -1 'permanently' disables autobooting, even if
bootcmd is specified.  Change to a positive value to allow
autobooting when a bootcmd is set.

Reported-by: Coray Tate <Coray.Tate@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

Fixed typo from CONIFG_MPC837X to CONFIG_MPC837X

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

the operating system may leave flash in a h/w locked state after writing.
This allows u-boot to continue to write flash by enabling h/w unlocking
by default.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

The spd_dram code shifts the base address, then masks 20 bits, but
forgets to shift the base address back. Fix this by just masking the
base address correctly.

Found this bug while trying to relocate a DDR memory at the base != 0.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

Depending on the configuration jumper "SATA SELECT", U-Boot disabled
either one PCIe node or the SATA node in the device tree blob. This
patch removes the unnecessary and even confusing warning, when the node
is not found at all.

Signed-off-by: Stefan Roese <sr@denx.de>

Signed-off-by: Remy Bohmer <linux@bohmer.net>

eventually leads to a machine check. This change assures that DPRAM
is allocated only once in that case.

Signed-off-by: Gary Jennejohn <garyj@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>

A few Spartan-3 definitions erroneously use Spartan-3E size
constants. This patch fixes them.

Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com>

Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>

Running mtest command on socrates without specifying
an address range crashes the board. This patch changes
default mtest address range to prevent this behavior.

Signed-off-by: Anatolij Gustschin <agust@denx.de>

Currently U-Boot crashes after relocation to RAM.
Changing the CPO value of the DDR SDRAM TIMING_CFG_2
register to READ_LAT + 1 (to the value it was before
conversion of socrates to new DDR code) fixes the
problem.

Signed-off-by: Anatolij Gustschin <agust@denx.de>

Commit be0bd823
changed SPD EEPROM address to 0x51 and DDR SDRAM
detection stopped working. Change this address
back to 0x50.

Signed-off-by: Anatolij Gustschin <agust@denx.de>

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

Add support watchdog for SH4A core (SH7763, SH7780 and SH7785).
And fix some compile warning.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

Old U-Boot supported 4KB page size only. If this version, Linux
kernel can not get command line from U-Boot.
SH Linux kernel can change page size and empty_zero_page.
This patch support this function and fix promlem.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

Add function of smc911x, pkt_data_pull and pkt_data_push.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Fix TBI PHY accesses to use the proper offset in CPU register space. The
previous code would incorrectly access the TBI PHY by reading/writing to CPU
register space at the same location as would be used to access external PHYs.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Andy Fleming <afleming@freescale.com>

After switching to using the CFI flash driver, the correct remapping
of the flash banks was forgotten.

Also, some boards were not adapted, and the old legacy flash driver
was not removed yet.

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

This patch is an attempt to implement autoprobing for the Lime
presence on the bus.
Configure GPCM for Lime CS2 and try to access chip ID registers.
Second read atempt delivers register values if the chip is present.

Signed-off-by: Anatolij Gustschin <agust@denx.de>

Signed-off-by: Detlev Zundel <dzu@denx.de>

netdev.h was not include by r2dplus.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>

Commit 2a1a2cb6 didnt remove the dummy mem reservation in fdt_chosen,
and this stopped Linux from booting with a Ramdisk. This patch fixes
this, by deleting the useless dummy mem reservation.

When booting with a Ramdisk, a fix offset FDT_RAMDISK_OVERHEAD is now
added to of_size, so we dont need anymore a dummy mem reservation.

I measured the value of FDT_RAMDISK_OVERHEAD on a MPC8270 based
system (=0x44 bytes) and rounded it up to 0x80).

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Kumar Gala <galak@kernel.crashing.org>