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  1. Dec 29, 2014
  2. Dec 18, 2014
    • Thierry Reding's avatar
      ARM: Implement non-cached memory support · 1dfdd9ba
      Thierry Reding authored
      
      Implement an API that can be used by drivers to allocate memory from a
      pool that is mapped uncached. This is useful if drivers would otherwise
      need to do extensive cache maintenance (or explicitly maintaining the
      cache isn't safe).
      
      The API is protected using the new CONFIG_SYS_NONCACHED_MEMORY setting.
      Boards can set this to the size to be used for the non-cached area. The
      area will typically be right below the malloc() area, but architectures
      should take care of aligning the beginning and end of the area to honor
      any mapping restrictions. Architectures must also ensure that mappings
      established for this area do not overlap with the malloc() area (which
      should remain cached for improved performance).
      
      While the API is currently only implemented for ARM v7, it should be
      generic enough to allow other architectures to implement it as well.
      
      Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      Signed-off-by: default avatarSimon Glass <sjg@chromium.org>
      Signed-off-by: default avatarTom Warren <twarren@nvidia.com>
      1dfdd9ba
    • Thierry Reding's avatar
      ARM: Implement non-cached memory support · ed710457
      Thierry Reding authored
      
      Implement an API that can be used by drivers to allocate memory from a
      pool that is mapped uncached. This is useful if drivers would otherwise
      need to do extensive cache maintenance (or explicitly maintaining the
      cache isn't safe).
      
      The API is protected using the new CONFIG_SYS_NONCACHED_MEMORY setting.
      Boards can set this to the size to be used for the non-cached area. The
      area will typically be right below the malloc() area, but architectures
      should take care of aligning the beginning and end of the area to honor
      any mapping restrictions. Architectures must also ensure that mappings
      established for this area do not overlap with the malloc() area (which
      should remain cached for improved performance).
      
      While the API is currently only implemented for ARM v7, it should be
      generic enough to allow other architectures to implement it as well.
      
      Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      Signed-off-by: default avatarSimon Glass <sjg@chromium.org>
      ed710457
    • Steve Rae's avatar
      fastboot: handle flash write to GPT partitions · 0ff7e585
      Steve Rae authored
      
      Implement a feature to allow fastboot to write the downloaded image
      to the space reserved for the Protective MBR and the Primary GUID
      Partition Table.
      Additionally, prepare and write the Backup GUID Partition Table.
      
      Signed-off-by: default avatarSteve Rae <srae@broadcom.com>
      Tested-by: default avatarLukasz Majewski <l.majewski@samsung.com>
      [Test HW: Exynos4412 - Trats2]
      0ff7e585
    • Rob Herring's avatar
      fastboot: add support for continue command · 267abc62
      Rob Herring authored
      
      The fastboot continue command is defined to exit fastboot and continue
      autoboot. This commit implements the continue command and the exiting of
      fastboot only. Subsequent u-boot commands can be processed after exiting
      fastboot. Autoboot should implement a boot script such as "fastboot; mmc
      read <...>; bootm" to fully implement the fastboot continue function.
      
      Signed-off-by: default avatarRob Herring <robh@kernel.org>
      Tested-by: default avatarLukasz Majewski <l.majewski@samsung.com>
      [TestHW: Exynos4412-Trats2]
      267abc62
    • Rob Herring's avatar
      usb, g_dnl: generalize DFU detach functions · fe1b28c9
      Rob Herring authored
      
      In order to add detach functions for fastboot, make the DFU detach related
      functions common so they can be shared.
      
      Signed-off-by: default avatarRob Herring <robh@kernel.org>
      Tested-by: default avatarLukasz Majewski <l.majewski@samsung.com>
      [TestHW: Exynos4412-Trats2]
      fe1b28c9
  3. Dec 12, 2014
    • Andrew Gabbasov's avatar
      mmc: Fix handling of bus widths and DDR card capabilities · 786e8f81
      Andrew Gabbasov authored
      
      If the MMC_MODE_DDR_52MHz flag is set in card capabilities bitmask,
      it is never cleared, even if switching to DDR mode fails, and if
      the controller driver uses this flag to check the DDR mode, it can
      take incorrect actions.
      
      Also, DDR related checks in mmc_startup() incorrectly handle the case
      when the host controller does not support some bus widths (e.g. can't
      support 8 bits), since the host_caps is checked for DDR bit, but not
      bus width bits.
      
      This fix clearly separates using of card_caps bitmask, having there
      the flags for the capabilities, that the card can support, and actual
      operation mode, described outside of card_caps (i.e. bus_width and
      ddr_mode fields in mmc structure). Separate host controller drivers
      may need to be updated to use the actual flags. Respectively,
      the capabilities checks in mmc_startup are made more correct and clear.
      
      Also, some clean up is made with errors handling and code syntax layout.
      
      Signed-off-by: default avatarAndrew Gabbasov <andrew_gabbasov@mentor.com>
      786e8f81
  4. Dec 11, 2014
  5. Dec 08, 2014
  6. Dec 07, 2014
  7. Dec 05, 2014
    • Alison Wang's avatar
      common: spl: Add interactive DDR debugger support for SPL image · ed392182
      Alison Wang authored
      
      To support interactive DDR debugger, cli_simple.o, cli.o, cli_readline.o,
      command.o, s_record.o, xyzModem.o and cmd_disk.o are all needed for
      drivers/ddr/fsl/interactive.c.
      
      In current common/Makefile, the above .o files are only produced when
      CONFIG_SPL_BUILD is disabled.
      
      For LS102xA, interactive DDR debugger is needed in SD/NAND boot too, and
      I enabled CONFIG_FSL_DDR_INTERACTIVE. But according to the current
      common/Makfile, all the above .o files are not produced in SPL part
      because CONFIG_SPL_BUILD is enabled in SPL part, the following error
      will be shown,
      
      drivers/ddr/fsl/built-in.o: In function `fsl_ddr_interactive':
      /home/wangh/layerscape/u-boot/drivers/ddr/fsl/interactive.c:1871:
      undefined reference to `cli_readline_into_buffer'
      /home/wangh/layerscape/u-boot/drivers/ddr/fsl/interactive.c:1873:
      undefined reference to `cli_simple_parse_line'
      make[1]: *** [spl/u-boot-spl] Error 1
      make: *** [spl/u-boot-spl] Error 2
      
      So this patch fixed this issue and the above .o files will be produced
      no matter CONFIG_SPL_BUILD is enabled or disabled.
      
      Signed-off-by: default avatarAlison Wang <alison.wang@freescale.com>
      Reviewed-by: default avatarYork Sun <yorksun@freescale.com>
      ed392182
  8. Dec 04, 2014
  9. Dec 03, 2014
  10. Dec 01, 2014
  11. Nov 27, 2014
  12. Nov 26, 2014
  13. Nov 25, 2014
  14. Nov 24, 2014
  15. Nov 23, 2014
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