- Oct 04, 2016
-
-
Since the mx6ull adds the AIPS3, so enable its initialization. Signed-off-by:
Peng Fan <peng.fan@nxp.com> Signed-off-by:
Ye Li <ye.li@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
-
Update memory map address for mx6ull. Signed-off-by:
-
Update Clock settings and CCM register map for i.MX6ULL. Signed-off-by:
-
Adjust POR_B settings on i.MX6ULL according to IC design team's suggestion: 2'b00 : always PUP100K 2'b01 : PUP100K when PMIC_ON_REQ || SOC_NOT_FAIL 2'b10 : always disable PUP100K 2'b11 : PDN100K when SOC_FAIL, PUP100K when SOC_NOT_FAIL -- recommended setting Signed-off-by:
Anson Huang <Anson.Huang@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
-
Update misc SOC related settings for i.MX6ULL, such as FEC mac address, cpu speed grading and mmdc channel mask clearing. Also update s_init to skip pfd reset. Signed-off-by: -
Since MX6ULL select MX6UL, we can not use IS_ENABLED(CONFIG_MX6UL) here, because this piece code is only for i.MX6UL. Signed-off-by:
Stefano Babic <sbabic@denx.de>
-
Rom already initialized clock at 396M and 132M for arm core and ahb, so skip setting them again in U-Boot. Signed-off-by:
-
The i.MX6ULL's GPT supportting taking OSC as clock source. Add i.MX6ULL support. Signed-off-by:
-
i.MX6ULL has two 128 bits fuse banks, bank 7 and bank 8, while other banks use 256 bits. So we have to adjust the word and bank index when accessing the bank 8. When in command line `fuse read 8 0 1`, you can image `fuse read 7 4 1` in the ocotp driver implementation for 6ULL. When programming, we use word index, so need to fix bank7/8 programming for i.mx6ull. For example: fuse prog 8 3 1; The word index is (8 << 3 | 3) --> 67. But actully it should be (7 << 3 | 7) ---> 63. So fix it. Signed-off-by: -
Introduce is_mx6ull macro. Signed-off-by: -
i.MX6ULL is derivative from i.MX6UL, so select MX6UL for MX6ULL. If need to differenate MX6ULL from MX6UL, use CONFIG_MX6ULL Signed-off-by:
-
Add i.MX6ULL major cpu type. Signed-off-by:
-
Add iomux header file for i.MX6ULL. Signed-off-by:
-
Correct name is "Boundary Devices". Signed-off-by:Fabio Estevam <fabio.estevam@nxp.com>
-
There is no stable mmcblk device numbering over different linux versions. Enable CMD_PART to be able to query the UUID of the root filesystem partition. So we can pass root=PARTUUID=XXX instead of root=/dev/mmcblkXpY in bootargs. Leave the default environment as is for now to stay compatible with original TBS settings. Signed-off-by:Soeren Moch <smoch@web.de>
-
Currently the driver asserts WDOG_B by clearing WCR_WDA bit when enabling the watchdog. Do not clear WCR_WDA. Signed-off-by:Ross Parker <rossjparker@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
-
The CPU detection macro is_mx6dq returns 0 on an i.MX6DQP, so we need to check for it explicitly in order to correctly initialize the pads when CONFIG_MX6QDL is defined. Signed-off-by:Filip Brozovic <fbrozovic@gmail.com>
-
The linux kernel imx_v6_v7_defconfig sets the user/kernel memory split to 3G/1G now (was 2G/2G before). We have to adapt the BOOTMAPSZ so that the decompressor finds zImage and dtb in lowmem. Signed-off-by: -
When using SPL on i.mx6 we frequently notice some DDR initialization mismatches between the SPL code and the non-SPL code. This causes stability issues like the ones reported at 7dbda25e ("mx6ul_14x14_evk: Pass refsel and refr fields to avoid hang") and also: http://lists.denx.de/pipermail/u-boot/2016-September/266355.html . As the non-SPL code have been tested for long time and proves to be reliable, let's configure the DDR in the exact same way as the non-SPL case. The idea is simple: just use the DCD table and write directly to the DDR registers. Retrieved the DCD tables from: board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg and board/freescale/mx6sabresd/mx6qp.cfg (NXP U-Boot branch imx_v2015.04_4.1.15_1.0.0_ga) This method makes it easier for people converting from non-SPL to SPL code. Other benefit is that the SPL binary size is reduced from 44 kB to 39.9 kB. Signed-off-by:
-
The videoargs script is kernel version dependent and since wandboard uses distro config, there is no need to handle videoargs locally. In case such video related settings are needed, then the proper location would be the distro extlinux.conf or boot.scr files. So remove 'videoargs' script. Signed-off-by: -
A kernel hang is observed when running wandboard 3.14 kernel and going to the lowest operational point of cpufreq: # ifconfig eth0 down # echo 1 > /sys/class/graphics/fb0/blank The problem is caused by incorrect setting of the REFR field of register MDREF. Setting it to 4 refresh commands per refresh cycle fixes the hang. Signed-off-by:
-
- Oct 03, 2016
-
-
Tom Rini authored
Signed-off-by:Tom Rini <trini@konsulko.com>
-
-
- Oct 02, 2016
-
-
Andrew F. Davis authored
Authentication of images in Falcon Mode is not supported. Do not enable SPL_OS_BOOT when TI_SECURE_DEVICE is enabled. This prevents attempting to directly load kernel images which will fail, for security reasons, on HS devices, the board is locked if a non-authenticatable image load is attempted, so we disable attempting Falcon Mode. Signed-off-by:
Andrew F. Davis <afd@ti.com> Reviewed-by:
Lokesh Vutla <lokeshvutla@ti.com>
-
Andrew F. Davis authored
This config option seems to be unused and is probably vestigial. Remove it. Signed-off-by:
-
Andrew F. Davis authored
Like OMAP54xx and AM43xx family SoCs, AM33xx based SoCs have high security enabled models. Allow AM33xx devices to be built with HS Device Type Support. Signed-off-by:
-
Andrew F. Davis authored
When CONFIG_FIT_IMAGE_POST_PROCESS or CONFIG_SPL_FIT_IMAGE_POST_PROCESS is enabled board_fit_image_post_process will be called, add this function to am33xx boards when CONFIG_TI_SECURE_DEVICE is set to verify the loaded image. Signed-off-by:
-
Andrew F. Davis authored
The option SPL_SPI_SUPPORT is used to enable support in SPL for loading images from SPI flash, it should not be used to determine the build type of the SPL image itself. The ability to read images from SPI flash does not imply the SPL will be booted from SPI flash. Unconditionally build SPI flash compatible SPL images. Signed-off-by:
-
Andrew F. Davis authored
Add a section describing the additional boot types used on AM33xx secure devices. Signed-off-by:
-
Andrew F. Davis authored
Depending on the boot media, different images are needed for secure devices. The build generates u-boot*_HS_* files as appropriate for the different boot modes. For AM33xx devices additional image types are needed for various SPL boot modes as the ROM checks for the name of the boot mode in the file it loads. Signed-off-by:
-
Andrew F. Davis authored
The config option AM33XX is used in several boards and should be defined as a stand-alone option for this SOC. We break this out from target boards that use this SoC and common headers then enable AM33XX on in all the boards that used these targets to eliminate any functional change with this patch. This is similar to what has already been done in 9de852642cae ("arm: Kconfig: Add support for AM43xx SoC specific Kconfig") and is done for the same reasons. Signed-off-by: -
Daniel Allred authored
Adds a secure dram reservation fixup for secure devices, when a region in the emif has been set aside for secure world use. The size is defined by the CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE config option. Signed-off-by:
Daniel Allred <d-allred@ti.com> Reviewed-by:
-
Daniel Allred authored
If the ending portion of the DRAM is reserved for secure world use, then u-boot cannot use this memory for its relocation purposes. To prevent issues, we mark this memory as PRAM and this prevents it from being used by u-boot at all. Signed-off-by: -
Daniel Allred authored
After EMIF DRAM is configured, but before it is used, calls are made on secure devices to reserve any configured memory region needed by the secure world and then to lock the EMIF firewall configuration. If any other firewall configuration needs to be applied, it must happen before the lock call. Signed-off-by: -
Daniel Allred authored
Create a few public APIs which rely on secure world ROM/HAL APIs for their implementation. These are intended to be used to reserve a portion of the EMIF memory and configure hardware firewalls around that region to prevent public code from manipulating or interfering with that memory. Signed-off-by:
-
Daniel Allred authored
Adds start address and size config options for setting aside a portion of the EMIF memory space for usage by security software (like a secure OS/TEE). There are two sizes, a total size and a protected size. The region is divided into protected (secure) and unprotected (public) regions, that are contiguous and start at the start address given. If the start address is zero, the intention is that the region will be automatically placed at the end of the available external DRAM space. Signed-off-by: -
Jacob Chen authored
rockchip platform have a protocol to pass the the kernel reboot mode to bootloader by some special registers when system reboot. In bootloader we should read it and take action. We can only setup boot_mode in board_late_init becasue "setenv" need env setuped. So add CONFIG_BOARD_LATE_INIT to common header and use a entry "rk_board_late_init" to replace "board_late_init" in board file. Signed-off-by:
Jacob Chen <jacob2.chen@rock-chips.com> Acked-by:
Simon Glass <sjg@chromium.org>
-
Jacob Chen authored
To keep it same with 3288 Signed-off-by:
-
Jacob Chen authored
Signed-off-by:
-
Jacob Chen authored
To keep it same with 3288. Signed-off-by:
-
