- Aug 21, 2007
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Stefan Roese authored
This patch adds support for the matrix keyboard on the lwmon5 board. Since the implementation in the dsPCI is kind of compatible with the "old" lwmon board, most of the code is copied from the lwmon board directory. Signed-off-by:
Stefan Roese <sr@denx.de>
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- Aug 06, 2007
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Stefan Roese authored
As suggested by Eugene O'Brien <Eugene.O'Brien@advantechamt.com>, here an updated Bamboo README. Signed-off-by:
Stefan Roese <sr@denx.de>
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- Aug 02, 2007
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Stefan Roese authored
Signed-off-by:
Stefan Roese <sr@denx.de>
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Grzegorz Bernacki authored
During config transactions on the PCIe bus an attempt to scan for a non-existent device can lead to a machine check exception with certain peripheral devices. In order to avoid crashing in such scenarios the instrumented versions of the config cycle read routines are introduced, so the exceptions fixups framework can gracefully recover. Signed-off-by:
Grzegorz Bernacki <gjb@semihalf.com> Acked-by:
Rafal Jaworowski <raj@semihalf.com>
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Rafal Jaworowski authored
This brings back separate settings for PCIe bus numbers depending on chip revision, which got eliminated in 2b393b0f commit. 440SPe rev. A does NOT work properly with the same settings as for the rev. B (no devices are seen on the bus during enumeration). Signed-off-by:
Rafal Jaworowski <raj@semihalf.com>
- Jul 31, 2007
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Eugene OBrien authored
Changed storage type of cfg_simulate_spd_eeprom to const Changed storage type of gpio_tab to stack storage (Cannot access global data declarations in .bss until afer code relocation) Improved SDRAM tests to catch problems where data is not uniquely addressable (e.g. incorrectly programmed SDRAM row or columns) Added CONFIG_PROG_SDRAM_TLB to support Bamboo SIMM/DIMM modules Fixed AM29LV320DT (OpCode Flash) sector map Signed-off-by:
Eugene OBrien <eugene.obrien@advantechamt.com> Signed-off-by:
Stefan Roese <sr@denx.de>
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Stefan Roese authored
- Clear ECC status regs after ECC POST test - Set dcbz for ECC generation with caches enabled as default - Code cleanup Signed-off-by:
Stefan Roese <sr@denx.de>
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- Jul 30, 2007
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Stefan Roese authored
Signed-off-by:
Stefan Roese <sr@denx.de>
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- Jul 28, 2007
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Matthias Fuchs authored
new FPGA image for PLU405 board with improved CompactFlash timing Signed-off-by:
Matthias Fuchs <matthias.fuchs@esd-electronics.com>
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- Jul 26, 2007
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Anatolij Gustschin authored
Change Lime SDRAM initialization to now support 100MHz and 133MHz (if enabled). Also the framebuffer is initialized to display a blue rectangle with a white border. Signed-off-by:
Anatolij Gustschin <agust@denx.de> Signed-off-by:
Stefan Roese <sr@denx.de>
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- Jul 24, 2007
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Stefan Roese authored
The used Intel NOR FLASH chips have internally two dies, and are now treated as two seperate chips. Signed-off-by:
Stefan Roese <sr@denx.de>
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Stefan Roese authored
As suggested by Hakan Eryigit, here an updated setup for the lwmon5 interrupt controller. Signed-off-by:
Stefan Roese <sr@denx.de>
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- Jul 20, 2007
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Stefan Roese authored
As spotted by Matthias Fuchs, the default output values for all GPIO1 outputs were not setup correctly. This patch fixes this issue. Signed-off-by:
Stefan Roese <sr@denx.de>
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Pavel Kolesnikov authored
This patch adds ECC Post test for the Lwmon5 board based on PPC440EPx to U-Boot. Signed-off-by:
Pavel Kolesnikov <concord@emcraft.com> Acked-by:
Yuri Tikhonov <yur@emcraft.com> Acked-by:
Stefan Roese <sr@denx.de>
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- Jul 19, 2007
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Rafal Jaworowski authored
This patch fixes the negative consequences for 8xx of the recent "ppc4xx: Clean up 440 exceptions handling" commit. Signed-off-by:
Rafal Jaworowski <raj@semihalf.com>
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- Jul 16, 2007
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Stefan Roese authored
Signed-off-by:
Stefan Roese <sr@denx.de>
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Stefan Roese authored
Signed-off-by:
Stefan Roese <sr@denx.de>
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Stefan Roese authored
The new boardspecific DDR2 controller configuration is used for the Yucca board. Now the Yucca board with 440SPe Rev. A chips is also supported. Signed-off-by:
Stefan Roese <sr@denx.de>
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Stefan Roese authored
The new "weak" functions ddr_wrdtr() and ddr_clktr() are added to better support non default, boardspecific DDR(2) controller configuration. Signed-off-by:
Stefan Roese <sr@denx.de>
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Stefan Roese authored
The new function remove_tlb() can be used to remove the TLB's used to map a specific memory region. This is especially useful for the DDR(2) setup routines which configure the SDRAM area temporarily as a cached area (for speedup on auto-calibration and ECC generation) and later need this area uncached for normal usage. Signed-off-by:
Stefan Roese <sr@denx.de>
- Jul 14, 2007
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Wolfgang Denk authored
Signed-off-by:
Wolfgang Denk <wd@denx.de>
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- Jul 13, 2007
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Heiko Schocher authored
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Heiko Schocher authored
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Heiko Schocher authored
Signed-off-by:
Heiko Schocher <hs@denx.de>
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Heiko Schocher authored
- fix compile error, if BUILD_DIR is used Signed-off-by:
Heiko Schocher <hs@denx.de>
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- Jul 12, 2007
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Stefan Roese authored
This change fixes a bug in the receive buffer handling, that could lead to problems upon high network traffic (broadcasts...). Signed-off-by:
Stefan Roese <sr@denx.de>
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- Jul 11, 2007
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Wolfgang Denk authored
Signed-off-by:
Wolfgang Denk <wd@denx.de>
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Wolfgang Denk authored
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Bartlomiej Sieka authored
Signed-off-by:
Piotr Kruszynski <ppk@semihalf.com> Signed-off-by:
Bartlomiej Sieka <tur@semihalf.com>
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Heiko Schocher authored
- now the Flash ST M29W040B is supported (not tested) - fix the "led" command - fix compile error, if BUILD_DIR is used Signed-off-by:
Heiko Schocher <hs@denx.de>
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- Jul 09, 2007
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Wolfgang Denk authored
Signed-off-by:
Wolfgang Denk <wd@denx.de>
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Wolfgang Denk authored
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- Jul 06, 2007
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Stefan Roese authored
Signed-off-by:
Stefan Roese <sr@denx.de>
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Stefan Roese authored
Add unlock=yes environment variable to default variables to unlock the CFI flash by default. Signed-off-by:
Stefan Roese <sr@denx.de>
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Wolfgang Denk authored
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Wolfgang Denk authored
Signed-off-by:
Wolfgang Denk <wd@denx.de>
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- Jul 05, 2007
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Sergei Poselenov authored
Signed-off-by:
Sergei Poselenov <sposelenov@emcraft.com>
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