Signed-off-by: Becky Bruce <becky.bruce@freescale.com>

Currently, both are defined as an unsigned long, but
should be phys_size_t. This should result in no real change,
since phys_size_t is currently an unsigned long for all the
default configs.  Also add print_lnum to cmd_bdinfo to deal
with the potentially wider memsize.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>

Conflicts:

	include/asm-ppc/fsl_lbc.h

Signed-off-by: Wolfgang Denk <wd@denx.de>

LAWs have the concept of priority so its useful to be able to allocate
the lowest (highest number) priority.  We will end up using this with the
new DDR code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

With the new LAW interface (set_next_law) we can move to letting the
system allocate which LAWs are used for what purpose.  This makes life
a bit easier going forward with the new DDR code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
Acked-by: Becky Bruce <becky.bruce@freescale.com>

Make it so we keep track of which LAWs have allocated and provide
a function (set_next_law) which can allocate a LAW for us if one is
free.

In the future we will move to doing more "dynamic" LAW allocation
since the majority of users dont really care about what LAW number
they are at.

Also, add CONFIG_MPC8540 or CONFIG_MPC8560 to those boards which needed them

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>

A number of board ports have empty version of board_early_init_f
for no reason since we control its via CONFIG_BOARD_EARLY_INIT_F.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

* Enable flash progress
* remove CLEAR_LAW0 since we dont really use it

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

Remove unused and unconfigured DDR test code from FSL 85xx boards.
Besides, other common code exists.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>

Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>

Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>

Signed-of-by: Sergei Poselenov <sposelenov@emcraft.com>

Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>

Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>

Some TQM85xx boards could be equipped with up to 1 GiB (NOR) Flash
memory. The current memory map only supports up to 128 MiB Flash.
This patch adds the configuration option CONFIG_TQM_BIGFLASH. If
set, up to 1 GiB flash is supported. To achieve this, the memory
map has to be adjusted in great parts (for example the CCSRBAR is
moved from 0xE0000000 to 0xA0000000).

If you want to boot Linux with CONFIG_TQM_BIGFLASH set, the new
memory map also has to be considered in the kernel (changed
CCSRBAR address, changed PCI IO base address, ...). Please use
an appropriate Flat Device Tree blob (tqm8548.dtb).

Signed-off-by: Martin Krause <martin.krause@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>

This patch adds support for NAND FLASH on the TQM8548. It is disabled by
default and can be enabled for the TQM8548 modules. It is now based on
the re-written FSL NAND UPM driver. A patch has been posted earlier today
with the subject:

"NAND FSL UPM: driver re-write using the hwcontrol callback"

Note that the R/B pin is not supported by that module requiring to use
the specified maximum delay time.

Note: With NAND support enabled the size of the U-Boot image exceeds
256 KB and TEXT_BASE must therefore be set to 0xfff80000 in config.mk,
doubling the image size :-(.

Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>

This patch adds support for PCI express cards. The board support
now uses common FSL PCI init code, for both, PCI and PCIe on all
TQM85xx modules.

Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>

This patch adds basic support for the TQM8548 module from TQ-Components
(http://www.tqc.de/

) including DDR2 SDRAM initialisation and support for
eTSEC 3 and 4

Furthermore Flash buffer write has been enabled to speed up output to
the Flash by approx. a factor of 10.

Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>

This patch adds support for Linux kernels using the Flat Device Tree.
It also re-defines the default environment settings for booting Linux
with the FDT blob.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>

This patch adds initialization of the UPMC RAM to support up to two
Intel 82527 compatible CAN controller on the TQM85xx modules.

Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>

The CS0_BNDS register is now set according to the detected
memory size.

Signed-off-by Martin Krause <martin.krause@tqs.de>

This patch fixes the re-calculation of the automatic chip select
configuration for boards with two populated FLASH banks.

Signed-off-by: Martin Krause <martin.krause@tqs.de>

The 'N' type Spansion flashes (S29GLxxxN series) have bigger sectors,
than the formerly used 'M' types (S29GLxxxM series), so the flash layout
needs to be changed -> new start address of the environment. The macro
definition CONFIG_TQM_FLASH_N_TYPE is undefined by default and must be
defined for boards with 'N' type flashes.

Signed-off-by: Martin Krause <martin.krause@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>

Do not configure port pins PD30/PD31 as SCC1 TxD/RxD except for the TQM8560
board. On the other TQM85xx boards (TQM8541 and TQM8555) SCC1 is not used
as serial interface anyway. Worse, on some board variants configuring the
pins for SCC1 leads to short circuits (for example on the TQM8541-BG).

Signed-off-by: Martin Krause <martin.krause@tqs.de>

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>

The working_fdt pointer was declared in common/fdt_support.c but was
not used there.  Move it to common/cmd_fdt.c where it is used (it is
also used in lib_ppc/bootm.c).

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>

differentiate with local variables of the same name by renaming the
global 'fdt' variable 'working_fdt'.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

The submitted patch seems to have been more up-to-date, but an older patch was
already in the repository.  This patch encompasses the differences

Taken entirely from Sergei Poselenov <sposelenov@emcraft.com>

Signed-off-by: Andy Fleming <afleming@freescale.com>

This is a re-write of the NAND FSL UPM driver using the more universal
hwcontrol callback (instead of the cmdfunc callback). Here is a brief
list of furher modifications:

- For the time being, the UPM setup writing the UPM array has been
  removed from the driver and must now be done by the board specific
  code.

- The bus width definition in "struct fsl_upm_nand" is now in bits to
  comply with the corresponding Linux driver and 8, 16 and 32 bit
  accesses are supported.

- chip->dev_read is only set if fun->dev_ready != NULL, which is
  required for boards not connecting the R/B pin.

- A few issue have been fixed with MxMR bit manipulation like in the
  corresponding Linux driver.

Note: I think the "io_addr" field of "struct fsl_upm" could be removed
      as well, because the address is already determined by
      "nand->IO_ADDR_[RW]", but I'm not 100% sure.

This patch has been tested on a TQM8548 modules with the NAND chip
Micron MT29F8G08FABWP.

This patch is based on the following patches posted to this list a few
minutes ago:

  PPC: add accessor macros to clear and set bits in one shot
  83xx/85xx/86xx: add more MxMR local bus definitions

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Acked-by: Anton Vorontsov <avorontsov@ru.mvista.com>