- Sep 07, 2016
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Wenbin Song authored
Use environment variable "kernel_addr_r" to indicate the location in RAM where FIT image will be stored. Use label command "kernel" to indicate which <path> the FIT image at. Signed-off-by:
Wenbin Song <wenbin.song@nxp.com>
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- Sep 06, 2016
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John Keeping authored
When enabling a fixed regulator, it may take some time to rise to the correct voltage. If we do not delay here then subsequent operations will fail. Signed-off-by:
John Keeping <john@metanate.com> Reviewed-by:
Tom Rini <trini@konsulko.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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- Aug 26, 2016
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Masahiro Yamada authored
Most of them are my mistakes. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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- Aug 16, 2016
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Simon Glass authored
This feature is not supported. Document this, and add some details on how it might be implemented. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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Simon Glass authored
UEFI is commonly used on x86. Add a reference to U-Boot's support for this in the x86 README. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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Simon Glass authored
The README indicates that this is not supported, but this is no-longer true. Update the text to indicate this and describe the FIT changes required. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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Stefan Roese authored
The debug FSP image is bigger in size than the normal FSP image. This patch adds a small description on how to use this FSP debug version by changing CONFIG_FSP_ADDR. Signed-off-by:
Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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- Aug 15, 2016
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Chris Zankel authored
The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Cadence. This is the first part of the basic architecture port with changes to common files. The 'arch/xtensa' directory, and boards and additional drivers will be in separate commits. Signed-off-by:
Chris Zankel <chris@zankel.net> Signed-off-by:
Max Filippov <jcmvbkbc@gmail.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Tom Rini <trini@konsulko.com>
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Wenyou Yang authored
Bring in required device tree file and bindings from Linux. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by:
Andreas Bießmann <andreas@biessmann.org> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Songjun Wu authored
DT binding documentation for atmel i2c driver. Signed-off-by:
Songjun Wu <songjun.wu@atmel.com> Reviewed-by:
Heiko Schocher <hs@denx.de> Acked-by:
Heiko Schocher <hs@denx.de>
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- Aug 08, 2016
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Vignesh R authored
TI's PCF8575 is a 16-bit I2C GPIO expander.The device features a 16-bit quasi-bidirectional I/O ports. Each quasi-bidirectional I/O can be used as an input or output without the use of a data-direction control signal. The I/Os should be high before being used as inputs. Read the device documentation for more details[1]. This driver is based on pcf857x driver available in Linux v4.7 kernel. It supports basic reading and writing of gpio pins. [1] http://www.ti.com/lit/ds/symlink/pcf8575.pdf Signed-off-by:
Vignesh R <vigneshr@ti.com> Reviewed-by:
Tom Rini <trini@konsulko.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Mugunthan V N <mugunthanvnm@ti.com>
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- Aug 05, 2016
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Xu Ziyuan authored
Miniarm is a rockchip rk3288 based development board, which has lots of interface such as HDMI, USB, micro-SD card, Audio etc. Signed-off-by:
Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by:
Simon Glass <sjg@chromium.org>
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- Aug 04, 2016
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Stephen Warren authored
In Tegra186, the BPMP (Boot and Power Management Processor) owns certain HW devices, such as the I2C controller for the power management I2C bus. Software running on other CPUs must perform IPC to the BPMP in order to execute transactions on that I2C bus. This binding describes an I2C bus that is accessed in such a fashion. Signed-off-by:
Stephen Warren <swarren@nvidia.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Stephen Warren authored
The BPMP implements some services which must be represented by separate nodes. For example, it can provide access to certain I2C controllers, and the I2C bindings represent each I2C controller as a device tree node. Update the binding to describe how the BPMP supports this. Signed-off-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Stephen Warren authored
The Tegra BPMP (Boot and Power Management Processor) is a separate auxiliary CPU embedded into Tegra to perform power management work, and controls related features such as clocks, resets, power domains, PMIC I2C bus, etc. These bindings dictate how to represent the BPMP in device tree. Signed-off-by:
Stephen Warren <swarren@nvidia.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Stephen Warren authored
The DT binding for the Tegra186 HSP module apparently wasn't quite final when I posted initial U-Boot support for it. Add the final DT binding doc and adapt all code and DT files to match it. Signed-off-by:
Stephen Warren <swarren@nvidia.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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- Aug 02, 2016
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Jaehoon Chung authored
Update the mmc maintainer from Pantelis to me. Acked-by:
Pantelis Antoniou <pantelis.antoniou@konsulko.com> Signed-off-by:
Jaehoon Chung <jh80.chung@samsung.com>
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- Aug 01, 2016
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Simon Glass authored
It is confusing to mention MAKEALL when it is not the normal way of building U-Boot anymore. Update the documentation to suit. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Tom Rini <trini@konsulko.com>
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- Jul 31, 2016
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jk.kernel@gmail.com authored
PopMetal is a rockchip rk3288 based board made by ChipSpark, which has many interface such as HDMI, VGA, USB, micro-SD card, WiFi, Audio and Gigabit Ethernet. Signed-off-by:
Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by:
Simon Glass <sjg@chromium.org>
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jk.kernel@gmail.com authored
Fennec is a RK3288-based development board with 2 USB ports, HDMI, micro-SD card, audio and WiFi and Gigabit Ethernet. It also includes on-board 8GB eMMC and 2GB of SDRAM. Expansion connectors provides access to display pins, I2C, SPI, UART and GPIOs. Signed-off-by:
Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by:
Simon Glass <sjg@chromium.org>
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- Jul 26, 2016
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Xu Ziyuan authored
Introduce how to use fastboot feature on rk3288. Signed-off-by:
Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by:
Simon Glass <sjg@chromium.org>
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Xu Ziyuan authored
evb-3288 board RK3288-based development board with 2 USB ports, HDMI, VGA, micro-SD card, audio, WiFi and Gigabit Ethernet. It also includes on-board 8G eMMC and 2GB of SDRAM. Expansion connector provide access to display pins, I2C, SPI, UART and GPIOs. This add some basic files required to allow the board to output serial messaged and can run command(mmc info etc). evb-rk3288 also supports booting from eMMC or SD card, the default is eMMC. Signed-off-by:
Ziyuan Xu <xzy.xu@rock-chips.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Xu Ziyuan authored
If we would like to boot from SD card, we have to implement mmc driver in SPL stage, and get a slightly large SPL binary. Rockchip SoC's bootrom code has the ability to load spl and u-boot, then boot. If CONFIG_ROCKCHIP_SPL_BACK_TO_BROM is enabled, the spl will return to bootrom in board_init_f(), then bootrom loads u-boot binary. Loading sequence after rework: bootrom ==> spl ==> bootrom ==> u-boot Signed-off-by:
Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by:
Simon Glass <sjg@chromium.org> Fixed up spelling of U-Boot, boorom, opinion->option, Rochchip: Signed-off-by:
Simon Glass <sjg@chromium.org>
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- Jul 22, 2016
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Thomas Gleixner authored
Booting a payload out of NAND FLASH from the SPL is a crux today, as it requires hard partioned FLASH. Not a brilliant idea with the reliability of todays NAND FLASH chips. The upstream UBI + UBI fastmap implementation which is about to brought to u-boot is too heavy weight for SPLs as it provides way more functionality than needed for a SPL and does not even fit into the restricted SPL areas which are loaded from the SoC boot ROM. So this provides a fast and lightweight implementation of UBI scanning and UBI fastmap attach. The scan and logical to physical block mapping code is developed from scratch, while the fastmap implementation is lifted from the linux kernel source and stripped down to fit the SPL needs. The text foot print on the board which I used for development is: 6854 0 0 6854 1abd drivers/mtd/ubispl/built-in.o Attaching a NAND chip with 4096 physical eraseblocks (4 blocks are reserved for the SPL) takes: In full scan mode: 1172ms In fastmap mode: 95ms The code requires quite some storage. The largest and unknown part of it is the number of fastmap blocks to read. Therefor the data structure is not put into the BSS. The code requires a pointer to free memory handed in which is initialized by the UBI attach code itself. See doc/README.ubispl for further information on how to use it. This shares the ubi-media.h and crc32 implementation of drivers/mtd/ubi There is no way to share the fastmap code, as UBISPL only utilizes the slightly modified functions ubi_attach_fastmap() and ubi_scan_fastmap() from the original kernel ubi fastmap implementation. Signed-off-by:
Thomas Gleixner <tglx@linutronix.de> Signed-off-by:
Ladislav Michl <ladis@linux-mips.org> Acked-by:
Heiko Schocher <hs@denx.de> Reviewed-by:
Tom Rini <trini@konsulko.com>
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- Jul 21, 2016
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Sumit Garg authored
Adds information regarding SPL handling validation process of main u-boot image on power/mpc85xx and arm/layerscape platforms. Signed-off-by:
Sumit Garg <sumit.garg@nxp.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
York Sun <york.sun@nxp.com>
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- Jul 16, 2016
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Robert P. J. Day authored
Fix a number of typos, including: * "compatble" -> "compatible" * "eanbeld" -> "enabled" * "envrionment" -> "environment" * "FTD" -> "FDT" (for "flattened device tree") * "ommitted" -> "omitted" * "overriden" -> "overridden" * "partiton" -> "partition" * "propogate" -> "propagate" * "resourse" -> "resource" * "rest in piece" -> "rest in peace" * "suport" -> "support" * "varible" -> "variable" Signed-off-by:
Robert P. J. Day <rpjday@crashcourse.ca>
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- Jul 15, 2016
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Simon Glass authored
Revise the content based on the v2 additions. This is kept as a separate patch to avoid confusing those who have already reviewed the v1 series. Signed-off-by:
Simon Glass <sjg@chromium.org> Suggested-by:
Tom Rini <trini@konsulko.com>
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Simon Glass authored
Add documentation on how this works, including the benefits and drawbacks. Signed-off-by:
Simon Glass <sjg@chromium.org>
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- Jul 14, 2016
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Andreas Dannenberg authored
Adds information regarding SPL handling the loading and processing of secured u-boot images as part of the second stage boot the SPL does. Introduces the description of a new interface script in the TI SECDEV Package which handles the creation and prep of secured binary images. Signed-off-by:
Daniel Allred <d-allred@ti.com> Signed-off-by:
Andreas Dannenberg <dannenberg@ti.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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- Jul 12, 2016
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If MAC is directly connected to another MAC (like a switch for example) we don't need to probe for a phy, autoneogation and so on. We simply have to setup speed. Signed-off-by:
Hannes Schmelzer <oe5hpm@oevsv.at> Acked-by:
Joe Hershberger <joe.hershberger@ni.com>
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Bin Meng authored
Now that platform-specific ACPI global NVS is added, pack it into ACPI table and get its address fixed up. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
George McCollister <george.mccollister@gmail.com> Tested-by:
George McCollister <george.mccollister@gmail.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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- Jul 11, 2016
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jk.kernel@gmail.com authored
It's easier to Cc rockchip maintainers on rockchip-releated patches. Signed-off-by:
jk <jk.kernel@gmail.com>
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- Jul 08, 2016
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Yoshinori Sato authored
Add support for standard type SCI (without FIFO) port. Signed-off-by:
Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by:
Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Yoshinori Sato authored
Add Device Tree bindings. Signed-off-by:
Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by:
Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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- Jul 01, 2016
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Masahiro Yamada authored
As the help message of CONFIG_BOOTDELAY says, CONFIG_BOOTDELAY=-2 means the autoboot with no delay, with no abort check even if CONFIG_ZERO_BOOTDELAY_CHECK is defined. To sum up, the autoboot behaves as follows: [1] CONFIG_BOOTDELAY=0 && CONFIG_ZERO_BOOTDELAY_CHECK=y autoboot with no delay, but you can abort it by key input [2] CONFIG_BOOTDELAY=0 && CONFIG_ZERO_BOOTDELAY_CHECK=n autoboot with no delay, with no check for abort [3] CONFIG_BOOTDELAY=-1 disable autoboot [4] CONFIG_BOOTDELAY=-2 autoboot with no delay, with no check for abort As you notice, [2] and [4] come to the same result, which means we do not need CONFIG_ZERO_BOOTDELAY_CHECK. We can control all the cases only by CONFIG_BOOTDELAY, like this: [1] CONFIG_BOOTDELAY=0 autoboot with no delay, but you can abort it by key input [2] CONFIG_BOOTDELAY=-1 disable autoboot [3] CONFIG_BOOTDELAY=-2 autoboot with no delay, with no check for abort This commit converts the logic as follow: CONFIG_BOOTDELAY=0 && CONFIG_ZERO_BOOTDELAY_CHECK=n --> CONFIG_BOOTDELAY=-2 Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by:
Stefan Roese <sr@denx.de> Acked-by:
Igor Grinberg <grinberg@compulab.co.il> Reviewed-by:
Simon Glass <sjg@chromium.org> Acked-by:
Vladimir Zapolskiy <vz@mleia.com> Reviewed-by:
Heiko Schocher <hs@denx.de> Acked-by:
Christian Riesch <christian.riesch@omicronenergy.com> Acked-by:
Hannes Schmelzer <hannes.schmelzer@br-automation.com>
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- Jun 24, 2016
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Teddy Reed authored
When building a FIT with external data (-E), U-Boot proper may require absolute positioning for executing the external firmware. To acheive this use the (-p) switch, which will replace the amended 'data-offset' with 'data-position' indicating the absolute position of external data. It is considered an error if the requested absolute position overlaps with the initial data required for the compact FIT. Signed-off-by:
Teddy Reed <teddy.reed@gmail.com>
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- Jun 21, 2016
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Hans de Goede authored
DISTRO_DEFAULTS is intended to mirror / replace include/config_distro_defaults.h. The intend is for boards which include this file to select this from their Kconfig files and when moving setting to Kconfig which are #define-ed in config_distro_defaults.h to select this from DISTRO_DEFAULTS so that boards which have selected DISTRO_DEFAULTS will keep the same configuration as before without needing any defconfig file changes. The initial list of selected things matches all settings recently removed from config_distro_defaults.h because they have been converted to Kconfig, with the exception of CMD_ELF and CMD_NET, which have a default of y, if the default of these ever changes they should be selected by DISTRO_DEFAULTS too. For testing and example purposes this commit also converts ARCH_SUNXI to use DISTRO_DEFAULT instead of selecting everything it needs itself. Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
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- Jun 20, 2016
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Boris Brezillon authored
Some drivers are still directly accessing the chip->mtd field. Patch them to use nand_to_mtd() instead. Signed-off-by:
Boris Brezillon <boris.brezillon@free-electrons.com>
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Fabian Mewes authored
Signed-off-by:
Fabian Mewes <architekt@coding4coffee.org>
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Max Krummenacher authored
nand torture currently works on exactly one nand block which is specified by giving the byteoffset to the beginning of the block. Extend this by allowing for a second parameter specifying the byte size to be tested. e.g. ==> nand torture 1000000 NAND torture: device 0 offset 0x1000000 size 0x20000 (block size 0x20000) Passed: 1, failed: 0 ==> nand torture 1000000 40000 NAND torture: device 0 offset 0x1000000 size 0x40000 (block size 0x20000) Passed: 2, failed: 0 Signed-off-by:
Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by:
Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> [scottwood: fix usage to show size as optional, and add misssing braces] Signed-off-by:
Scott Wood <oss@buserror.net>
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