- Mar 30, 2015
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Marcel Ziswiler authored
Pingroup ATC seems to come out of reset with config set to NAND, so we need to explicitly configure some other function to this group in order to avoid clashing settings. Signed-off-by:
Marcel Ziswiler <marcel@ziswiler.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Lucas Stach authored
Even the 8-bit case needs KBCB configured, as pin D7 is located in this pingroup. Please note that pingroup ATC seems to come out of reset with its config set to NAND so one needs to explicitly configure some other function to this group in order to avoid clashing settings which is outside the scope of this patch. Signed-off-by:
Lucas Stach <dev@lynxeye.de> Signed-off-by:
Marcel Ziswiler <marcel@ziswiler.com> Tested-by:
Marcel Ziswiler <marcel@ziswiler.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Marcel Ziswiler authored
Bring the Colibri T20 configuration in-line with Apalis/Colibri T30. Signed-off-by:
Marcel Ziswiler <marcel@ziswiler.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Marcel Ziswiler authored
Fix ASIX USB to Ethernet chip reset. Signed-off-by:
Marcel Ziswiler <marcel@ziswiler.com> Acked-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Marcel Ziswiler authored
A while ago I got Russell to change the machine type of our Colibri T20 from COLIBRI_TEGRA2 to COLIBRI_T20 which at least in parts is also reflected in his machine registry: http://www.arm.linux.org.uk/developer/machines/list.php?id=3323 For us it is really very beneficial to actually still be able to boot downstream L4T kernel with its working hardware accelerated graphics/multimedia stack albeit it being proprietary/closed-source. Signed-off-by:
Marcel Ziswiler <marcel@ziswiler.com> Acked-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Marcel Ziswiler authored
In accordance with our other modules supported by U-Boot and as agreed upon for Apalis/Colibri T30 get rid of the carrier board in the board/ configuration/device-tree naming. While at it also bring the prompt more in line with our other products. Signed-off-by:
Marcel Ziswiler <marcel@ziswiler.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Marcel Ziswiler authored
As a preparatory step to renaming the board folder as well first get rid of the colibri_t20-common after having integrated it into colibri_t20_iris for now. While at it also migrate to using NVIDIA's common.mk magic. Signed-off-by:
Marcel Ziswiler <marcel@ziswiler.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Simon Glass authored
Requesting a GPIO without a name is not supposed anymore. This causes the request to fail. Add a name so that the serial console works on seaboard. Signed-off-by:
Simon Glass <sjg@chromium.org> Reported-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Simon Glass authored
This CONFIG is not used, so drop it. Signed-off-by:
Simon Glass <sjg@chromium.org> Tested-by:
Stephen Warren <swarren@wwwdotorg.org> Acked-by:
Stephen Warren <swarren@wwwdotorg.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Stephen Warren authored
This allows selection between CSI and DSI_B on the MIPI pads. Signed-off-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Stephen Warren authored
Some pinmux controls are in a different register set. Add support for manipulating those in a similar way to existing pins/groups. Signed-off-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Stephen Warren authored
Move struct pmux_pingrp_desc type and tegra_soc_pingroups variable declaration together with other pin/mux level definitions. Now the whole file is grouped/ordered pin/mux-related then drvgrp-related definitions. Fix typo in ifdef comment. Signed-off-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Stephen Warren authored
Patches that added the Tegra210 pinctrl driver and renamed directories arch/arm/cpu/tegra{$soc}-common -> arch/arm/mach-tegra/tegra-${soc} crossed. Move the Tegra210 pinctrl driver to the correct location. This wasn't detected since Tegra210 support is in the process of being added, and isn't buildable yet. Signed-off-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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- Mar 27, 2015
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David Feng authored
Signed-off-by:
David Feng <fenghua@phytium.com.cn>
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David Feng authored
Allocate memory space for pre-allocation malloc and zero global data. This code is partly from crt0.S. Signed-off-by:
David Feng <fenghua@phytium.com.cn>
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- Mar 25, 2015
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Sjoerd Simons authored
List bootable partitions and only scan those for bootable files, falling back to partition 1 if there are no bootable partitions Signed-off-by:
Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by:
Hans de Goede <hdegoede@redhat.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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Sjoerd Simons authored
env exists allows scripts to query whether an environment variable exists. Enable by default as it adds only a trivial amount of code and can be useful in scripts. Signed-off-by:
Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by:
Hans de Goede <hdegoede@redhat.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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Sjoerd Simons authored
Add an optional -bootable parameter to the part list commands to only put the list of bootable partitions in the environment variable Signed-off-by:
Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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- Mar 24, 2015
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Gilles Gameiro authored
After v2015.01 we need to have DM enabled in order to use UART. Also fix a typo in the EEPROM config format. Signed-off-by:
Gilles Gameiro <gilles@gigadevices.com> [trini: Reword commit message, re-save defconfigs with 'savedefconfig'] Signed-off-by:
Tom Rini <trini@konsulko.com>
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Stephen Warren authored
Apparently the firmware's board rev response includes both the board revision and some other data even on the RPi1. In particular, the "warranty bit" is bit 24. We need to mask that out when looking up the board ID. Signed-off-by:
Stephen Warren <swarren@wwwdotorg.org>
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Rob Herring authored
Various files are needlessly rebuilt every time due to the version and build time changing. As version.h is not actually needed, remove the include. Signed-off-by:
Rob Herring <robh@kernel.org> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefano Babic <sbabic@denx.de> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Marek Vasut <marex@denx.de> Cc: Tom Warren <twarren@nvidia.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Macpaul Lin <macpaul@andestech.com> Cc: Wolfgang Denk <wd@denx.de> Cc: York Sun <yorksun@freescale.com> Cc: Stefan Roese <sr@denx.de> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Philippe Reynes <tremyfr@yahoo.fr> Cc: Eric Jarrige <eric.jarrige@armadeus.org> Cc: "David Müller" <d.mueller@elsoft.ch> Cc: Phil Edworthy <phil.edworthy@renesas.com> Cc: Robert Baldyga <r.baldyga@samsung.com> Cc: Torsten Koschorrek <koschorrek@synertronixx.de> Cc: Anatolij Gustschin <agust@denx.de> Reviewed-by:
Linus Walleij <linus.walleij@linaro.org> Reviewed-by:
Łukasz Majewski <l.majewski@samsung.com>
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- Mar 23, 2015
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Masahiro Yamada authored
The callee (arch/arm/lib/cache-cp15.c) has a #ifdef CONFIG_SYS_DCACHE_OFF conditional. The same conditional in the caller (arch/arm/mach-uniphier/cache_uniphier.c) is redundant. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
The L2 cache is used as a temporary SRAM on SPL. Now the secondary CPUs store the necessary code for jumping to Linux on their L1 I-caches. So, the L2 cache can be disabled much earlier, at the very entry of U-Boot proper (lowlevel_init). This makes the boot sequence clearer. Also, as the L1 cache has been disabled by the start.S, enable_caches() does not need to do it again. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Currently, the secondary CPU(s) are kicked three times: Boot ROM ---(kick)--> SPL ---(kick)--> U-boot ---(kick)--> Linux. It makes the boot sequence very complicated. This commit merges the first and the second kicks, so the secondary CPU(s) can directly jump from SPL to Linux. arch/arm/mach-uniphier/smp.S is no longer necessary. Linux boot test passed. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
To remove the ifdef conditional of CONFIG_SKIP_LOWLEVEL_INIT, add late_lowlevel_init.S to U-Boot proper. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
There is no good reason to have the 0x1000 gap between CONFIG_SYS_INIT_SP_ADDR and CONFIG_SYS_TEXT_BASE. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
The Boot ROM of UniPhier platform only loads 64KB image. We should always make sure that SPL memory footprint is less than that. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Ifdef conditionals for CONFIG options are not Kconfig-friendly. Instead, define CONFIG_SPL_STACK to prepare for Kconfig moves. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Enable CONFIG_SPL_DM and CONFIG_SPL_SERIAL_SUPPORT, which provide Driver Model UART support on SPL. CONFIG_SYS_SPL_MALLOC_{START,SIZE} should be dropped because simple malloc is preferred on SPL. Dlmalloc requires some static variables on .data section that is not available yet for NOR boot mode etc. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Do not reset board on panic, which allows us to not link reset_cpu() into SPL. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
The UniPhier platform is going to enable Driver Model and UART support on SPL. Move UART pin settings to early_pin_init(), which is called from SPL. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Since we do not have OF_CONTROL support for SPL, platform devices are necessary to enable Driver Model on SPL. To prepare for that, move platdevice.o to SPL and enable it by CONFIG_SPL_DM. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
The two Makefiles arch/arm/mach-uniphier/{ph1-ld4,ph1-sld8}/Makefile are completely the same. We can improve the maintainability by having one to include the other. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Since commit a86ac954 (ARM: UniPhier: include <mach/*.h> instead of <asm/arch/*.h>), UniPhier platform does not need the symbolic link arch/arm/include/asm. This option is not necessary either. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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- Mar 21, 2015
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Paul Kocialkowski authored
This allows printing the error message when VBUS is detected, as it would with AXP VBUS detect. Signed-off-by:
Paul Kocialkowski <contact@paulk.fr> Acked-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
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- Mar 20, 2015
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Tom Rini authored
This flag was missing and thus the board was totally being configured wrong. Signed-off-by:
Tom Rini <trini@konsulko.com>
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git://git.denx.de/u-boot-atmelTom Rini authored
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- Mar 18, 2015
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Bo Shen authored
When access the programmable secure peripherals address space, it needs set them to non-secured. Signed-off-by:
Bo Shen <voice.shen@atmel.com>
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