- Apr 20, 2016
-
-
Sam Protsenko authored
And also reformat defconfigs using "make savedefconfig" rule. Signed-off-by:
Sam Protsenko <semen.protsenko@linaro.org>
-
Sam Protsenko authored
Signed-off-by:
Sam Protsenko <semen.protsenko@linaro.org>
-
Sam Protsenko authored
Signed-off-by:
Sam Protsenko <semen.protsenko@linaro.org>
-
Sam Protsenko authored
Description was borrowed from kernel dwc3 Kconfig. Signed-off-by:
Sam Protsenko <semen.protsenko@linaro.org>
-
Sam Protsenko authored
While at it, remove obsolete CONFIG_USBDOWNLOAD_GADGET option from some config headers. This is also probably fixes am335x_baltos board. Signed-off-by:
Sam Protsenko <semen.protsenko@linaro.org>
-
Sam Protsenko authored
Move CONFIG_USB_GADGET_DUALSPEED option to Kconfig and make all UDC controllers select USB_GADGET_DUALSPEED: - add next options to Kconfig selecting USB_GADGET_DUALSPEED: - USB_GADGET_ATMEL_USBA - USB_GADGET_DWC2_OTG - USB_DWC3 - CI_UDC - make USB_MUSB_GADGET select USB_GADGET_DUALSPEED While at it, make some related fixes: - remove DUALSPEED from configs that don't enable gadget support: - kwb.h - tseries.h - add missing USB_GADGET option to next configs: - novena_defconfig - pcm051_rev*_defconfig - xfi3_defconfig Signed-off-by:
Sam Protsenko <semen.protsenko@linaro.org>
-
Sam Protsenko authored
The description was borrowed from kernel. Definitions were added to defconfig files in a way that "make savedefconfig" generates exactly the same file as used defconfig. Boards using 0 mA as CONFIG_USB_GADGET_VBUS_DRAW value were moved to use 2 mA (as minimal allowed by Kconfig). Signed-off-by:
Sam Protsenko <semen.protsenko@linaro.org>
-
John Tobias authored
The USB Mass Storage (ums) works in Windows, Linux and OS X (EL Capitan). But, not in OS X (Yosemite). By applying the said patch, it extends the ums support. Signed-off-by:
John Tobias <john.tobias.ph@gmail.com> Tested-by:
Lukasz Majewski <l.majewski@samsung.com> Test HW: Odroid XU3 (./test/py UMS + DFU tests) Tested-by:
John Tobias <john.tobias.ph@gmail.com> Linux: - Run ums to expose all my eMMC partition - shows all correctly - Run ums to expose only 1 partition of my eMMC - show correctly Windows: - Run ums to expose all my eMMC partition - it detects but it prompts, if I want to format it (due to a non windows partition) - Run ums to expose only the FAT32 partition - it show the partition correctly.
-
Marek Vasut authored
The code uses a lot of signed numbers, which ended up in variables of unsigned type, which resulted in all sorts of underflows. This in turn caused incorrect calibration on certain boards. Moreover, repair the readout of the DQ delay, which was being pulled from wrong register. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
-
Marek Vasut authored
Just staticize global variables in sequencer, since there is no point in having these symbols available outside of the DDR code. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
-
Marek Vasut authored
Originally, the DLEVEL selects the debug level within the sequencer code, but only displays the messages on that particular debug level. Tweak the handling such that for particular debug level, debug messages on that level and lower are displayed. This allows better regulation of debug message verbosity. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
-
Marek Vasut authored
This one last set of delay configuration registers was not properly zeroed out originally, fix it and zero them out. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
-
Marek Vasut authored
There is no point in resetting the ODT setting if the write test failed, since the code will always retry the calibration and thus reconfigure the ODT anyway OR the code will fail calibration and halt. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
-
Marek Vasut authored
Every invocation of the scc_mgr_set_dqs_en_delay_all_ranks() is followed by SCC manager update. Moreover, only this function triggers the SCC manager update internally. Thus, remove the internal invocation to avoid triggering the update twice. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
-
Marek Vasut authored
The hi address bitfield in the protection rule must be set to the last address in the region which the rule represents. The behavior is now in-line with code generated by Quartus 15.1 . Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
-
Marek Vasut authored
The code should be setting registers to zero, not one register to value. Swap the order of arguments to correct the behavior. The behavior is now in-line with code generated by Quartus 15.1 . Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
-
Marek Vasut authored
In the most unlikely case the DQS tracking was to be disabled, make sure we do not errornously re-enable it. Note that DQS tracking is enabled on all systems observed thus far. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
-
Marek Vasut authored
The bit 22 is in fact DQS tracking enable bit (dqstrken) and there is a macro for this bit already, so use it. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
-
- Apr 18, 2016
-
-
Tang Yuantian authored
Ensure data the following sata command used is flushed out of dcache and written to physical memory or timeout error may happen. Signed-off-by:
Tang Yuantian <yuantian.tang@nxp.com>
-
Stephen Warren authored
dm_serial_ops.pending should return the number of characters, not just a valid C Boolean integer value. The existing code does already does this, but only as an accident since BCM283X_MU_LSR_RX_READY happens to be BIT(0). Enhance the code to be more explicit about the values it returns. Suggested-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Stephen Warren <swarren@wwwdotorg.org>
-
Lokesh Vutla authored
Not all Keystone2 devices has AEMIF NAND controller. So adding Kconfig entry for CONFIG_TI_AEMIF and enabling it in respective defconfigs on platforms with AEMIF controller. Reported-by:
Nishanth Menon <nm@ti.com> Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by:
Tom Rini <trini@konsulko.com>
-
Tom Rini authored
If get_dev_addr fails it will return FDT_ADDR_T_NONE and: >>> "priv->usid == 4294967295U" is always false regardless of the values of its operands. This occurs as the logical operand of if. Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reported-by: Coverity (CID: 143914) Signed-off-by:
Tom Rini <trini@konsulko.com>
-
Tom Rini authored
If get_dev_addr fails it will return FDT_ADDR_T_NONE and: >>> "priv->pid == 4294967295U" is always false regardless of the values of its operands. This occurs as the logical operand of if. Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reported-by: Coverity (CID: 143913) Signed-off-by:
Tom Rini <trini@konsulko.com>
-
Mugunthan V N authored
Add request gpio for CD and WP gpios, so that the gpio can be used for the respective purposes. Signed-off-by:
Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by:
Tom Rini <trini@konsulko.com>
-
Mugunthan V N authored
omap_hsmmc driver directly typecasts fdt_addr_t to a pointer. This is not strictly correct, as it gives a build warning when fdt_addr_t is u64. So, use map_physmem for a proper typecasts. This is inspired by commit 167efe01 ("dm: ns16550: Use an address instead of a pointer for the uart base") drivers/mmc/omap_hsmmc.c: In function ‘omap_hsmmc_ofdata_to_platdata’: drivers/mmc/omap_hsmmc.c:776:20: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] priv->base_addr = (struct hsmmc *)dev_get_addr(dev); ^ Signed-off-by:
Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by:
Tom Rini <trini@konsulko.com>
-
- Apr 15, 2016
-
-
Tom Rini authored
In rollback_space_kernel we were not initializing the reserved fields which should be for safety sake, and doing memset here means we don't need to set the version field specifically either. Reported-by: Coverity (CID: 143917) Cc: Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Rini <trini@konsulko.com>
-
Stephen Warren authored
This function parses the reg property based on an index found in the reg-names property. This is required for bindings that are written using reg-names rather than hard-coding indices in reg. Signed-off-by:
Stephen Warren <swarren@nvidia.com> Acked-by:
Simon Glass <sjg@chromium.org>
-
- Apr 14, 2016
-
-
Stefan Roese authored
Fix multi-line comment indentation in device_bind() Signed-off-by:
Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
-
Peng Fan authored
We may have pinmux settings for pinctrl device, like the following example: " &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog_1>; imx6ul-evk { pinctrl_hog_1: hoggrp-1 { fsl,pins = < MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 /* SD1 CD */ MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT 0x17059 /* SD1 VSELECT */ MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x17059 /* SD1 RESET */ MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x80000000 >; }; [......] }; " We should not only select pinctrl state for non pinctrl devices, we need also to handle pin mux settings such as pinctrl_log for pinctrl devices. So at the end of probing process of pinctrl device, select the default state of pinctrl device. Signed-off-by:
Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
-
- Apr 13, 2016
-
-
Moritz Fischer authored
This is a possible drop in replacement for drivers/i2c/zynq-i2c.c Since this is cadence IP it has been renamed to cdns-i2c, to make sense with the compatible string. Signed-off-by:
Moritz Fischer <moritz.fischer@ettus.com> Reviewed-by:
Heiko Schocher <hs@denx.de> Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
-
Michal Simek authored
Warnings: w+../drivers/gpio/pca953x.c: In function ‘do_pca953x’: w+../drivers/gpio/pca953x.c:220:5: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] w+../drivers/gpio/pca953x.c:233:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
-
Siva Durga Prasad Paladugu authored
Enable ZYNQ_GPIO for ZynqMP using Kconfig. It enables the GPIO driver support for ZynqMP. Signed-off-by:
Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
-
Siva Durga Prasad Paladugu authored
Add GPIO driver support for ZynqMP platform Signed-off-by:
Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
-
Siva Durga Prasad Paladugu authored
Move all the gpio definitions to driver file as there is no use of them in other files. Signed-off-by:
Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
-
Siva Durga Prasad Paladugu authored
Remove non driver model support as it moved to driver model. Dont need non driver model anymore. Signed-off-by:
Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
-
Siva Durga Prasad Paladugu authored
Enable DM GPIO and ZYNQ GPIO using kconfig instead of the board config file. Signed-off-by:
Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
-
Siva Durga Prasad Paladugu authored
Convert Zynq GPIO driver to driver model Signed-off-by:
Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
-
Rouven Behr authored
Unlock current sector instead of sector 0 before buffered write. [Patch subject and commit text slightly reworded, Stefan] Signed-off-by:
Rouven Behr <u-boot@behr-iss.de> Signed-off-by:
Stefan Roese <sr@denx.de>
-
- Apr 12, 2016
-
-
Stefan Roese authored
This patch adds the missing configuration of the output value to the gpio_direction_output() function. Without this, calling gpio_direction_output() does not set the out-value at all and only configures the gpio as output. Signed-off-by:
Stefan Roese <sr@denx.de> Cc: Kevin Smith <kevin.smith@elecsyscorp.com> Reviewed-by:
Kevin Smith <kevin.smith@elecsyscorp.com>
-
Hans de Goede authored
On the H3 we need to enable the clk and de-assert the reset of the companion to be able to talk to the actual usb host controller. Before this commit we were also disabling the companion clk-gate / asserting its reset on remove, causing the later remove callback of the companion itself to (sometimes) fail with: ERROR: USB HC reset timed out! This commit fixes this by not disabling the companion's clk-gate nor asserting its reset on remove. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Acked-by:
Ian Campbell <ijc@hellion.org.uk>
-