- Sep 09, 2010
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Stefano Babic authored
Signed-off-by:
Stefano Babic <sbabic@denx.de>
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git://git.denx.de/u-boot-tiWolfgang Denk authored
- Sep 08, 2010
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Wolfgang Denk authored
commit 47e26b1b "cmd_usage(): simplify return code handling" caused the following compile warnings: bedbug_860.c: In function 'bedbug860_do_break': bedbug_860.c:73: warning: 'return' with a value, in function returning void bedbug_860.c:121: warning: 'return' with a value, in function returning void Fix the return type. Actually these files could need some cleanup - commands should return proper error codes, and there are coding style issues. => To be fixed later. Signed-off-by:
Wolfgang Denk <wd@denx.de>
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Ricardo Salveti de Araujo authored
Correctly set PAD1_FREF_CLK4_REQ and PAD0_FREF_CLK4_OUT to enable and activate both LEDs while setting pad mux. Since this increases the line length, this patch also adjusts the white space in this section of code to allign the pad mux signal description comments. Signed-off-by:
Ricardo Salveti de Araujo <ricardo.salveti@canonical.com> Signed-off-by:
Steve Sakoman <steve@sakoman.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Steve Sakoman authored
An upcoming version of Overo uses a Wifi/BT module with 1.8V signaling, eliminating the need for an external transceiver to handle the level shifting. This patch detects whether an external transceiver is present and adjusts the pinmux settings as appropriate. Signed-off-by:
Steve Sakoman <steve@sakoman.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Steve Sakoman authored
This patch adds support for the Beagle xM. It uses the board ID GPIO bits to recognize this revision and perform appropriate setup. Signed-off-by:
Steve Sakoman <steve@sakoman.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Steve Sakoman authored
Future versions of these boards have options for POP memory with no NAND. This option prevents display of error messages when no NAND is detected. Signed-off-by:
Steve Sakoman <steve@sakoman.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Steve Sakoman authored
This printk was added recently and results in ugly output on systems with no NAND: NAND: nand_get_flash_type: unknown NAND device: Manufacturer ID: 0x00, Chip ID: 0x00 0 MiB instead of: NAND: 0 MiB Signed-off-by:
Steve Sakoman <steve@sakoman.com> Acked-by:
Scott Wood <scottwood@freescale.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Steve Sakoman authored
Upcoming Beagle and Overo revisions use POP memory with 256MB or 512MB per bank. This patches uses the SDRC settings from x-load or the config header to set up timing properly. Signed-off-by:
Steve Sakoman <steve@sakoman.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Steve Sakoman authored
Using the reset command on OMAP36XX/37XX and OMAP4 caused a hang. This patch uses the reset bit appropriate for each CPU architecture. Signed-off-by:
Steve Sakoman <steve@sakoman.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Mans Rullgard authored
The workarounds for errata 621766 and 725233 should only be applied on affected Cortex-A8 revisions. Recent chips use r3px cores where these have been fixed. Signed-off-by:
Mans Rullgard <mans@mansr.com> Signed-off-by:
Steve Sakoman <steve@sakoman.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Mans Rullgard authored
This function consists entirely of inline asm statements, so writing it directly in a .S file is simpler. Additionally, the inline asm is not safe as is, since registers are not guaranteed to be preserved between asm() statements. Signed-off-by:
Mans Rullgard <mans@mansr.com> Signed-off-by:
Steve Sakoman <steve@sakoman.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Mans Rullgard authored
On OMAP34xx ES1.0, the L2 enable bit can only be set in secure mode, so an SMC call to the ROM monitor is required. On later versions, and on newer devices, this bit is banked and we can set it directly. The code checked only the ES revision of the chip, and hence incorrectly used the ROM call on ES1.0 versions of other devices. This patch adds a check for chip family as well as revision, and also removes some code duplication between the enable and disable functions. Signed-off-by:
Mans Rullgard <mans@mansr.com> Signed-off-by:
Steve Sakoman <steve@sakoman.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Steve Sakoman authored
This patch configures clocks properly when a 36XX/37XX processor is detected. Signed-off-by:
Steve Sakoman <steve@sakoman.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Steve Sakoman authored
TI has added new processors to the OMAP3 family. This patch enhances the code in sysinfo.c to detect which family member is present. Signed-off-by:
Steve Sakoman <steve@sakoman.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Steve Sakoman authored
Confiures GPMC timings for both chips and also configures pinmux for GPIO_65, which is used as the interrupt signal for the second chip Signed-off-by:
Scott Ellis <scott@jumpnowtek.com> Signed-off-by:
Steve Sakoman <steve@sakoman.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Steve Sakoman authored
This patch enhances the revision detection function and adds support for the C4 revision. The board revision is printed and approriate revision specific setup is done automatically. Signed-off-by:
Steve Sakoman <steve@sakoman.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Steve Sakoman authored
The latest Overo COM modules encode their revision number on GPIOs 115, 113, and 112. All boards to date have no pullups on these pins and hence appear as revision 0. This patch reads and prints the revision information. Signed-off-by:
Steve Sakoman <steve@sakoman.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Steve Sakoman authored
Allows one to set the processor clock rate via "setenv mpurate 720" for example Default is set to a "safe" 500 Mhz. Signed-off-by:
Steve Sakoman <steve@sakoman.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Steve Sakoman authored
This patch modifies the pinmux setup for MMC1_CLK and MMC3_CLK to enable the input driver. MMC2_CLK was already properly configured. Signed-off-by:
Steve Sakoman <steve@sakoman.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Steve Sakoman authored
This patch adds a function to allow one to easily set the target voltage for the TWL4030 regulators. It also modifies the existing code to use this new function. Applicable definitions are moved out of the driver file and into the header file so that they are generally accessible Signed-off-by:
Steve Sakoman <steve@sakoman.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Steve Sakoman authored
The functions in syslib.c can be shared, so this patch moves it from cpu/omap3 to cpu/omap-common Signed-off-by:
Steve Sakoman <steve@sakoman.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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- Sep 07, 2010
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Wolfgang Denk authored
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git://git.denx.de/u-boot-shWolfgang Denk authored
- Sep 04, 2010
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Xiangfu Liu authored
From the document, if set all arguments in "OUTPUT_FORMAT" to "tradbigmips", then even add "-EL" to gcc we still get EB format. pb1x00 is only used in Little-endian, so its default endian should be set to LE. Signed-off-by:
Xiangfu Liu <xiangfu@openmobilefree.net> Signed-off-by:
Shinya Kuribayashi <skuribay@pobox.com>
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- Sep 03, 2010
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Alexander Stein authored
Signed-off-by:
Alexander Stein <alexander.stein@systec-electronic.com>
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Haavard Skinnemoen authored
Use the MMU hardware to set up 1:1 mappings between physical and virtual addresses. This allows us to bypass the cache when accessing the flash without having to do any physical-to-virtual address mapping in the CFI driver. The virtual memory mappings are defined at compile time through a sorted array of virtual memory range objects. When a TLB miss exception happens, the exception handler does a binary search through the array until it finds a matching entry and loads it into the TLB. The u-boot image itself is covered by a fixed TLB entry which is never replaced. This makes the 'saveenv' command work again on ATNGW100 and other boards using the CFI driver, hopefully without breaking any rules. Signed-off-by:
Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
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Haavard Skinnemoen authored
The paging system which is required to set up caching properties has not yet been initialized when the SDRAM is initialized. So when the map_physmem() function is converted to return the physical address unchanged, the SDRAM initialization will break on some boards. The avr32-specific uncached() macro will return an address which will always cause uncached accessed to be made. Since this happens in the board code, using avr32-specific features should be ok, and will allow the SDRAM initialization to keep working. Signed-off-by:
Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
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Haavard Skinnemoen authored
In addition to the real PC value, also print the value of PC after subtracting the relocation offset. This value will match the address in the ELF file so it's much easier to figure out where things went wrong. Signed-off-by:
Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
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Reinhard Meyer authored
Signed-off-by:
Reinhard Meyer <u-boot@emk-elektronik.de>
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Reinhard Meyer authored
Signed-off-by:
Reinhard Meyer <u-boot@emk-elektronik.de>
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