This stuff has been rotting in the tree for a year now. Remove it.

Signed-off-by: Marek Vasut <marex@denx.de>

This stuff has been rotting in the tree for a year now. Remove it.

Signed-off-by: Marek Vasut <marex@denx.de>

So other parts can be added.

Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>

Move the hardcoded ddr2/ddr3 settings for the ti boards to board code,
so other boards can use different types/timings.

Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
[trini: Make apply with rtc32k_enable() in the file]
Signed-off-by: Tom Rini <trini@ti.com>

So they are available for other boards.

Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>

So platforms can override it with board_mmc_init() if needed.

Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>

The i2c header is specific to ti(-derived) boards, and not generic for all
am335x boards.

Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
[trini: Make re-apply with rtc32k_enable() applied]
Signed-off-by: Tom Rini <trini@ti.com>

Only used here (and uart_base only for SPL).

Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>

Add the required config.mk logic for this SoC as well as the BOOT_DEVICE
define.  Finally, enable the options on the am335x_evm.

Signed-off-by: Tom Rini <trini@ti.com>

Add MLO.byteswap as a target to spl/Makefile and un-guard the first MLO
rule so we don't have to duplicate it.

Signed-off-by: Tom Rini <trini@ti.com>

D0/D1 Swapped or not is a board property, not anything specific to
the am33xx SoC, so add a custom define for it.

At the same time correct the bit handling for the swapped mode
(DPE0 should be cleared and SI/DPE1 set).

Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>

Add video support to the board with the display
focaltech etm070003dh6.

Signed-off-by: Stefano Babic <sbabic@denx.de>

Signed-off-by: Stefano Babic <sbabic@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>

Some GPIOs differ in the new revision board.
Previous revision are considered obsolete and
they will not anymore supported.

Signed-off-by: Stefano Babic <sbabic@denx.de>

The mcx board was slightly modified and the pinmux must be updated.
There is no need to support the old board, that becomes obsolete.

Signed-off-by: Stefano Babic <sbabic@denx.de>

Updated revision of the board uses GPIOs to activate
the USB ports.

Signed-off-by: Stefano Babic <sbabic@denx.de>

In order to support low power state, you must source kernel system
timers to persistent clock, available across suspend/resume.  In case of
AM335x device, the only source we have is, RTC32K, available in
wakeup/always-on domain.  Having said that, during validation it has
been observed that, RTC clock need couple of seconds delay to stabilize
the RTC OSC clock; and such a huge delay is not acceptable in kernel
especially during early init and also it will impact quick/fast boot
use-cases.

So, RTC32k OSC enable dependency has been shifted to
SPL/first-bootloader.

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>

Add Freescale MCF54418TWR ColdFire development board support.

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Alison Wang <b18965@freescale.com>

Add MCF5441x CPU support.

The MCF5441x devices are a family of highly-integrated 32-bit
microprocessors based on the Version 4m ColdFire microarchitecture,
comprising of the V4 integer core, memory management unit(MMU) and
enchanced multiply-accumulate unit(EMAC).

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Alison Wang <b18965@freescale.com>

Fix the following build warnings in cpu_init.c:

cpu_init.c: In function 'cpu_init_f':
cpu_init.c:47:9: warning: unused variable 'pll'
cpu_init.c:46:10: warning: unused variable 'fbcs'
cpu_init.c:44:10: warning: unused variable 'scm1'

Signed-off-by: Alison Wang <b18965@freescale.com>

Add support for the new kmvect1 board powered by the mpc8309 processor.
As this board is very similar to the existing suvd3, instead of adding a
new config header file, just add a new config option to suvd3.h

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

Add support for Keymile boards based on mpc8309
(it would be only kmvect1 for now)

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
[#elseif -> #if to allow kmcoge5ne and kmeter1 to build successfully]
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

This processor, though very similar to other members of the
PowerQUICC II Pro family (namely 8308, 8360 and 832x), provides
yet another feature set than any supported sibling.

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

Introduce a new configuration token CONFIG_MPC830x to be shared among
mpc8308 and mpc8309. Define it for existing 8308 boards, and refactor
existing common code so to make future introduction of 8309 simpler.

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

simplify #if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832x)
for qe variables
with #if defined(CONFIG_QE)

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

Neither cm-t35, nor cm-t3730 is using OneNAND or flash.
Remove the related defines from config file.

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>

Fix usage of 'mmc rescan' by many configs.  Proper use is
'mmc dev ${mmcdev}; mmc rescan' to set the mmc device and then rescan
the device.  'mmc rescan' itself does not take any arguments.

Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>

DDR3 support is tested and working with beaglebone hardware. Include a check
for this board type and configure DDR3. The timings and other configuration
match EVM SK.

Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
Acked-by: Jason Kridner <jdk@ti.com>

The endpoint rx count register value will be zero if it is read before
receive packet ready bit (PERI_RXCSR:RXPKTRDY) is set.

Check for the receive packet ready bit (PERI_RXCSR:RXPKTRDY) before
reading endpoint rx count register. Proceed with rx count read and
FIFO read only if RXPKTRDY bit is set.

Signed-off-by: Pankaj Bharadiya <pankaj.bharadiya@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>

The timeout_save variable was only used by the DDR111_134
erratum code. It was being set, but never used. Newer compilers
will actually complain about this.

Signed-off-by: Andy Fleming <afleming@freescale.com>

Currently, the SRIO and PCIE boot master module will be compiled into the
u-boot image if the macro "CONFIG_FSL_CORENET" has been defined. And this
macro has been included by all the corenet architecture platform boards.
But in fact, it's uncertain whether all corenet platform boards support
this feature.

So it may be better to get rid of the macro "CONFIG_FSL_CORENET", and add
a special macro for every board which can support the feature. This
special macro will be defined in the header file
"arch/powerpc/include/asm/config_mpc85xx.h". It will decide if the SRIO
and PCIE boot master module should be compiled into the board u-boot image.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

LAN8720 PHY is used on Freescale C2X0QDS board.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

Current espi controller driver assumes the command length of write command is
not equal to '1', it was made based on SPANSION SPI flash, but some SPI flash
driver such as SST does use write command length as '1', so write command on
SST SPI flash will not work. And the length check for write command is not
necessary for SPANSION, though it's harmless for SPANSION, it will stop write
operation on flashes like SST, so we remove the check.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>