Stefan Roese authored 8 years ago and Heiko Schocher committed 8 years ago

This patch adds support for the PCI(e) based I2C cores. Which can be
found for example on the Intel Bay Trail SoC. It has 7 I2C controllers
implemented as PCI devices.

This patch also adds the fixed values for the timing registers for
BayTrail which are taken from the Linux designware I2C driver.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

Stefan Roese authored 8 years ago and Heiko Schocher committed 8 years ago

This patch adds DM support to the designware I2C driver. It currently
supports DM and the legacy I2C support. The legacy support should be
removed, once all platforms using it have DM enabled.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>

Stefan Roese authored 8 years ago and Heiko Schocher committed 8 years ago

This patch prepares the designware I2C driver for the DM conversion.
This is mainly done by removing struct i2c_adapter from the functions
that shall be used by the DM driver version as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>

Stefan Roese authored 8 years ago and Heiko Schocher committed 8 years ago

Integrating set_speed() into dw_i2c_set_bus_speed() will make the
conversion to DM easier for this driver.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>

Stefan Roese authored 8 years ago and Heiko Schocher committed 8 years ago

dw_i2c_enable() is used to dis-/en-able the I2C controller. It makes
sense to add such a function, as the controller is dis-/en-abled
multiple times in the code. Additionally, this function now checks,
if the controller is really dis-/en-abled. This code is copied
from the Linux I2C driver version.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

Stefan Roese authored 8 years ago and Heiko Schocher committed 8 years ago

Add the ic_enable_status register to the i2c_regs struct. Additionally
the register offsets are added, to better check, if the offset matches
the register description in the datasheet.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>

Stefan Roese authored 8 years ago and Heiko Schocher committed 8 years ago

On some platforms (e.g. x86), the return value of dev_get_addr() can't
be assigned to a pointer type variable directly. As there might be a
difference between the size of fdt_addr_t and the pointer type. On
x86 for example, "fdt_addr_t" is 64bit but "void *" only 32bit. So
assigning the register base directly in dev_get_addr() results in this
compilation warning:
  warning: cast to pointer from integer of different size

This patch introduces the new function dev_get_addr_ptr() that
returns a pointer to the 'reg' address that can be used by drivers
in this case.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

Miao Yan's email address is wrong in fw_cfg.c. Fix it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

Our own ACPI implementation (when CONFIG_QEMU_ACPI_TABLE is not set)
does not build anymore after x86 has been fully converted to DM PCI.
Instead of trying to fix the build errors, given we now have the ACPI
support via QEMU's fw_cfg interface, which is a more reliable way to
generate correct ACPI tables than by ourselves, hence drop our own
ACPI implementation.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

flush_dcache_all() is used in the very end of U-Boot self relocation
to write back all copied and then patched code and data to their
new location in the very end of available memory space.

Since that has nothing to do with IO (i.e. no external DMA happens
here) IOC won't help here and we need to write back data cache contents
manually.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Signed-off-by: Tom Rini <trini@konsulko.com>

As part of 3457bbaf these configs didn't get updated.  Update them now.

Signed-off-by: Tom Rini <trini@konsulko.com>

Previously, ret could be used uninitialized if
blk_get_device_part_str() failed.  Default to ret being set to -1 so
that we always return an err up if we have a problem and then invert the
logic on testing ums_count as when that is non-zero is the time we can
return 0.

Cc: John Tobias <john.tobias.ph@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
	configs/bcm28155_ap_defconfig
	configs/dra72_evm_defconfig
	configs/dra74_evm_defconfig
	configs/ma5d4evk_defconfig

Signed-off-by: Tom Rini <trini@konsulko.com>

And also reformat defconfigs using "make savedefconfig" rule.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>

Description was borrowed from kernel dwc3 Kconfig.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>

While at it, remove obsolete CONFIG_USBDOWNLOAD_GADGET option from some
config headers. This is also probably fixes am335x_baltos board.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>

Move CONFIG_USB_GADGET_DUALSPEED option to Kconfig and
make all UDC controllers select USB_GADGET_DUALSPEED:
  - add next options to Kconfig selecting USB_GADGET_DUALSPEED:
    - USB_GADGET_ATMEL_USBA
    - USB_GADGET_DWC2_OTG
    - USB_DWC3
    - CI_UDC
  - make USB_MUSB_GADGET select USB_GADGET_DUALSPEED

While at it, make some related fixes:
  - remove DUALSPEED from configs that don't enable gadget support:
    - kwb.h
    - tseries.h
  - add missing USB_GADGET option to next configs:
    - novena_defconfig
    - pcm051_rev*_defconfig
    - xfi3_defconfig

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>

The description was borrowed from kernel. Definitions were added to
defconfig files in a way that "make savedefconfig" generates exactly
the same file as used defconfig.

Boards using 0 mA as CONFIG_USB_GADGET_VBUS_DRAW value were moved to use
2 mA (as minimal allowed by Kconfig).

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>

By applying this patch, it will give us some flexibility to expose
a selected partition/s.

e.g:
1. To expose several partitions
ums 0 mmc 0:1,0:6

2. To expose the all partitions
ums 0 mmc 0:0

3. To expose multiple partititions on several devices
ums 0 mmc 0:1,1:6

4. It support legacy format
ums 0 mmc 0

Signed-off-by: John Tobias <john.tobias.ph@gmail.com>

The USB Mass Storage (ums) works in Windows, Linux and OS X (EL Capitan).
But, not in OS X (Yosemite). By applying the said patch, it extends
the ums support.

Signed-off-by: John Tobias <john.tobias.ph@gmail.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>

Test HW: Odroid XU3 (./test/py UMS + DFU tests)

Tested-by: John Tobias <john.tobias.ph@gmail.com>

Linux:
    - Run ums to expose all my eMMC partition - shows all correctly
    - Run ums to expose only 1 partition of my eMMC - show correctly

Windows:
    - Run ums to expose all my eMMC partition - it detects but it prompts,
    if I want to format it (due to a non windows partition)
    - Run ums to expose only the FAT32 partition - it show the partition
      correctly.

This enables full ethernet usage, including U-Boot to write the board
specific MAC address (ethaddr) into the DT blob before passing it to
Linux.

Without this, the ethaddr is not detected in U-Boot at all, resulting
in this error upon bootup:

...
Model: EBV SOCrates
Net:
Error: ethernet@ff702000 address not set.
No ethernet found.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>

Fix a small typo in some of the SoCFPGA dts files that has spread via
copy-and-paste.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>

The code uses a lot of signed numbers, which ended up in variables
of unsigned type, which resulted in all sorts of underflows. This
in turn caused incorrect calibration on certain boards. Moreover,
repair the readout of the DQ delay, which was being pulled from
wrong register.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>

Just staticize global variables in sequencer, since there is no
point in having these symbols available outside of the DDR code.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>

Originally, the DLEVEL selects the debug level within the sequencer code,
but only displays the messages on that particular debug level. Tweak the
handling such that for particular debug level, debug messages on that
level and lower are displayed. This allows better regulation of debug
message verbosity.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>

This one last set of delay configuration registers was not properly
zeroed out originally, fix it and zero them out.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>

There is no point in resetting the ODT setting if the write test
failed, since the code will always retry the calibration and thus
reconfigure the ODT anyway OR the code will fail calibration and
halt.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>

Every invocation of the scc_mgr_set_dqs_en_delay_all_ranks() is
followed by SCC manager update. Moreover, only this function
triggers the SCC manager update internally. Thus, remove the
internal invocation to avoid triggering the update twice.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>

The hi address bitfield in the protection rule must be set to
the last address in the region which the rule represents. The
behavior is now in-line with code generated by Quartus 15.1 .

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>

The code should be setting registers to zero, not one register to value.
Swap the order of arguments to correct the behavior. The behavior is now
in-line with code generated by Quartus 15.1 .

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>

In the most unlikely case the DQS tracking was to be disabled,
make sure we do not errornously re-enable it. Note that DQS
tracking is enabled on all systems observed thus far.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>

The bit 22 is in fact DQS tracking enable bit (dqstrken) and there
is a macro for this bit already, so use it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>

MIPS arch do not update 'reg' property of /memory node.
As a result Linux bootup will not work unless board.dts
file contains right /memory offset-size information or
board implements required memory fixup.
Fixing by renaming (unused) _arch_fixup_memory_node_ to
_arch_fixup_fdt_ in arch/mips/lib/bootm.c inline with ARM arch.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>