- Jan 24, 2015
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Simon Glass authored
These are quite common and we may as well press on and not be so picky. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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Simon Glass authored
Allow the supported modes to be listed when in debug mode. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
As it turns out this is a normal condition, so suppress the error. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
We shouldn't assume that the VGA ROM can always be loaded at c0000. This is only true on x86 machines. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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Simon Glass authored
This code is too x86-dependent at present. Correct it so that it can run on big-endian machines. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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Simon Glass authored
This stops the debug mode from working properly. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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- Jan 23, 2015
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Masahiro Yamada authored
These boards are still non-generic boards. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
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Masahiro Yamada authored
This board is still a non-generic board. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Josef Wagner <Wagner@Microsys.de>
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Masahiro Yamada authored
This board is still a non-generic board. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com>
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Masahiro Yamada authored
These boards are still non-generic boards. It is a good thing that we can drop board-specific hack code from drivers/mtd/nand/nand_base.c Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by:
Stefan Roese <sr@denx.de> Cc: Andrea "llandre" Marson <andrea.marson@dave-tech.it>
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Masahiro Yamada authored
This board is still a non-generic board. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com>
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Masahiro Yamada authored
This board is still a non-generic board. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Ira W. Snyder <iws@ovro.caltech.edu>
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Masahiro Yamada authored
These boards are still non-generic boards: P1011RDB, P1022RDB, P2010RDB, P2020RDB Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com>
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Masahiro Yamada authored
These boards are still non-generic boards. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Dave Liu <daveliu@freescale.com> Cc: Anton Vorontsov <avorontsov@ru.mvista.com>
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http://git.denx.de/u-boot-sunxiTom Rini authored
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Ian Campbell authored
The CPU info is already logged during boot e.g. CPU: Allwinner A20 (SUN7I) so the prompt is just one more thing to change for each new SoC, just makes it "sunxi#" instead. Signed-off-by:
Ian Campbell <ijc@hellion.org.uk> Acked-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
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Hans de Goede authored
The Hyundai A7HD is a 7" 16:9 A10 powered tablet featuring 1G RAM, 8G nand, 1024x600 IPS screen, a mini hdmi port, mini usb receptacle and a headphones port for details see: http://linux-sunxi.org/Hyundai_A7HD Cc: Mark Janssen <maniac@maniac.nl> Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Acked-by:
Ian Campbell <ijc@hellion.org.uk>
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Hans de Goede authored
It turns out that there are some panels where the pwm input is not active low, so make it configurable. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Acked-by:
Ian Campbell <ijc@hellion.org.uk>
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Ian Campbell authored
HDMI, SATA, USB and Ethernet appear functional, I've not done extensive tests of all peripherals though. Signed-off-by:
Ian Campbell <ijc@hellion.org.uk> Acked-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
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Hans de Goede authored
Currently we've separate detailed dram settings for all sun7i boards, this moves them over to using auto dram configuration so that we can get rid of all the per board dram_foo.c files. This has been tested on a A20-Olinuxino-Lime, A20-Olinuxino_MICRO, Bananapi, Bananapro, Cubieboard2, Cubietruck, Mele_M3 and a Linksprite_pcDuino3. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Acked-by:
Ian Campbell <ijc@hellion.org.uk>
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Hans de Goede authored
The qt840a is one of the many tv-boxes using the "i12" A20 pcb, but it populates only one of the 2 places for a 16 bit dram ic, thus reducing the buswidth to 16 bits, and the amount of ram to 512M, which is why we had a separate config for it. This commit switches the generic i12-tvbox_defconfig over to DRAM autoconfiguration, so that it will work with the qt840a too, and drops the qt840a specific config, like we've done with other memory-amount specific configs before. Tested on a generic i12-tvbox with 32 bit bus-width / 1G RAM, and on a qt840a with 16 bit bus-width / 512M RAM. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Acked-by:
Ian Campbell <ijc@hellion.org.uk>
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Hans de Goede authored
The Chuwi V7 is an A10 (sun4i) based tablet with 1G of RAM, 16G of nand flash, microsd slot, 7" 1024x768 lvds ips panel, mini hdmi out, headphones out, stereo speakers, front & back camera and usb wifi. It is clearly marked "CHUWI", "V7" and "Model: CW0825" on the back of the tablet. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Acked-by:
Ian Campbell <ijc@hellion.org.uk>
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Hans de Goede authored
Add support for Hitachi tx18d42vm LVDS LCD panels, these panels have a lcd controller which needs to be initialized over SPI, once that is done they work like a regular LVDS panel. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Acked-by:
Anatolij Gustschin <agust@denx.de> Acked-by:
Ian Campbell <ijc@hellion.org.uk>
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git://git.denx.de/u-boot-mpc85xxTom Rini authored
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git://git.denx.de/u-boot-mipsTom Rini authored
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- Jan 22, 2015
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Hans de Goede authored
Add support for Hitachi tx18d42vm LVDS LCD panels, these panels have a lcd controller which needs to be initialized over SPI, once that is done they work like a regular LVDS panel. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Acked-by:
Anatolij Gustschin <agust@denx.de>
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Masahiro Yamada authored
PH1-sLD3, PH1-LD6b have DDR channel 2. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com>
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Masahiro Yamada authored
Match the suffixes of SG_MEMCONF_* macros with SZ_* macros defined by <linux/sizes.h> for readability. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com>
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Masahiro Yamada authored
Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com>
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Masahiro Yamada authored
The inlining is done by GCC when needed, there is no need to do it explicitly. Furthermore, the inline keyword does not force-inline the code, but is only a hint for the compiler. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com>
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Masahiro Yamada authored
Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com>
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Masahiro Yamada authored
For PH1-Pro4, the bit 6 of the IECTRL must be set. It is the only available bit in this register. There is no effect of the write access to the other bits. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com>
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Masahiro Yamada authored
The assembly directive ".rept ... .endr" allows us to write the init_page_table much shorter. To make things further simpler, set the text and stack area as Normal Memory, and the other sections as Device attribute. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com>
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Masahiro Yamada authored
Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com>
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Masahiro Yamada authored
The DDR PHY training function, ddrphy_prepare_training() would not work if compiled with GCC 4.9. The struct ddrphy (arch/arm/include/asm/arch-uniphier/ddrphy-regs.h) is specified with __packed because it represents a hardware register mapping, but it turned out to cause a problem on GCC 4.9. If -mno-unaligned-access is specified (yes, it is in arch/arm/cpu/armv7/config.mk), GCC 4.9 is aware of the __attribute__((packed)) and generates extra instructions to perform the memory access in a way that does not cause unaligned access. (Actually it is not need here because the register base, the first argument of the ddrphy_prepare_training(), is always given with a 4-byte aligned address.) Anyway, as a result, readl() / writel() is divided into byte-wise accesses. The problem is that this hardware only accepts 4-byte register access. Byte-wise accesses lead to unexpected behavior. There are some options to avoid this problem. [1] Remove -mno-unaligned-access [2] Add __aligned(4) along with __packed to struct ddrphy [3] Remove __packed from struct ddrphy [1] solves the problem for ARMv7, but it does not for pre-ARMv6 and ARMv6-M architectures where -mno-unaligned-access is default. So, [1] does not seem reasonable in terms of code portability. Both [2] and [3] work well, but [2] seems too much. All the members of struct ddrphy have the u32 type. No padding would be inserted even if __packed is dropped. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by:
Tom Rini <trini@ti.com>
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Hans de Goede authored
Hookup OTG USB controller support and enable the otg controller + USB-keyb on various tablets. This allows tablet owners to interact with u-boot without needing to solder a serial console onto their tablet PCB. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Acked-by:
Ian Campbell <ijc@hellion.org.uk>
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