- Feb 09, 2015
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Michal Simek authored
This patch has some parts connected together: - Use _gd in bss section which is automatically cleared Location at SPL_MALLOC_END wasn't cleared at all - Use MALLOC_F_LEN(early alloc) instead of FULL MALLOC (mem_malloc_init is not called at all) - Simplify malloc and stack init. At the end of SPL addr is malloc area and below is stack Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Create space for dm_init where calloc is called and malloc_base has to be initialized. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Because it is not compatible with DM where malloc_base has to be available early and init has to be done in ASM. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Microblaze target supports both OF and !OF cases and from log is not clear which version is running. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Remove one instruction in the loop which speedup code copying. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Compile code with -fPIC to get GOT. Do not build SPL with fPIC because it increasing SPL size for nothing. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Simplify SPL NOR init. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Setup gd from ASM to be availalbe for board_init_r. Setting it up in spl_board_init is too late when MALLOC is used. Space for gd is located behind MALLOC area at the end of BRAM. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
It is not used at all that's why remove it. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Do not use microblaze specific interrupt init function. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
DTB is added to rodata section: [ 2] .rodata PROGBITS 84c5b60c 05c60c 00c618 00 A 0 0 4 [ 3] .dtb.init.rodata PROGBITS 84c67c30 068c30 003c80 00 A 0 0 16 [ 4] .rela.dyn RELA 84c6b8b0 06c8b0 000534 0c A 0 0 4 [ 5] .data PROGBITS 84c6bde4 06cde4 001536 00 WA 0 0 16 Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Add one more debug message about enabling global interrupts. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
No functional changes just to pass checkpatch.pl. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Do not use specific macros for debugging. Also remove compilation warning: w+../arch/microblaze/cpu/interrupts.c: In function 'interrupt_handler': w+../arch/microblaze/cpu/interrupts.c:153:2: warning: format '%x' expects argument of type 'unsigned int', but argument 2 has type 'void (*)(void *)' [-Wformat] w+../arch/microblaze/cpu/interrupts.c:153:2: warning: format '%x' expects argument of type 'unsigned int', but argument 4 has type 'void *' [-Wformat] Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Just coding style cleanup - no functional changes. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Show also return address from exception which should suggest where the problem is. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Do not save registers below r1 stack pointer because it is not checked by stack undeflow is not able to detect it. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Andreas Bießmann authored
This is required for architectures still need manual relocation like avr32, mk68 and others. Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Tested-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Signed-off-by:
Michal Simek <michal.simek@xilinx.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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- Feb 04, 2015
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git://git.denx.de/u-boot-ubiTom Rini authored
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- Feb 02, 2015
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Tom Rini authored
Signed-off-by:
Tom Rini <trini@ti.com>
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git://git.denx.de/u-boot-tiTom Rini authored
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git://git.denx.de/u-boot-sunxiTom Rini authored
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Siarhei Siamashka authored
This results in a much more readable callgraph, because now they can't be confused with the function having exactly the same name in the generic mmc code. Signed-off-by:
Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
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Siarhei Siamashka authored
This patch allows to configure all the important DRAM parameters in Kconfig. Signed-off-by:
Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
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Siarhei Siamashka authored
In addition to the current Android magic settings, allow to optionally use DDR3 timing parameters, which are tailored for different clock frequencies and JEDEC speed bins. This should improve reliability and performance. Adding '+S:CONFIG_DRAM_TIMINGS_DDR3_1066F_1333H=y' to the board defconfig allows to use timings, which are calculated for the DDR3-1066F speed bin. A lot of DDR3 chips, which are used in real Allwinner based devices, support DDR3-1066F speed bin timings. And adding '+S:CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y' should work with any DDR3 chips, because this targets the slowest JEDEC speed bins. The vendor magic values are still used by default for DRAM, but board maintainers now have more flexibility in DRAM timings selection. Signed-off-by:
Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
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Hans de Goede authored
On both my A13-OLinuxIno and my A13-OLinuxIno-Micro, the vga output gives an unstable image when active low v or hsync is used. The problem seems to be specific to the OLinuxIno A13 (normal & micro) boards. I've just looked up the schematics and they use an opendrain driver for the vga sync lines, and with sync pulses it is the logical high->low edge of the pulse which counts for the timing, which with an active low sync is being driven by the pull-up, and that simply seems to not drive it hard enough to get a stable image. So force v and hsync active high on these boards. independent of what the modeline says. This fixes the unstable image. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Acked-by:
Ian Campbell <ijc@hellion.org.uk>
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Michal Suchanek authored
Signed-off-by:
Michal Suchanek <hramrach@gmail.com> Acked-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
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Paul Kocialkowski authored
Signed-off-by:
Paul Kocialkowski <contact@paulk.fr> Acked-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
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Adam Sampson authored
This is a low-cost Allwinner A20 board with Arduino-style GPIO headers; it features 1G RAM, 4G NAND flash, 1 micro-SD, 2 USB sockets, 1 micro USB socket for OTG and another for power in, HDMI, SATA, 5V power for SATA devices, gigabit Ethernet, an IR receiver, 3.5mm audio out and a MIPI camera connector. Like the BananaPi, this board needs GMAC_TX_DELAY set to 3 in order for GMAC to work reliably at gigabit speeds. For more details, see: http://linux-sunxi.org/LinkSprite_pcDuino3_Nano Signed-off-by:
Adam Sampson <ats@offog.org> Acked-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
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Hans de Goede authored
Keep all entries except for the monster entry at the top alphabetically sorted. Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
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Hans de Goede authored
It turns out that the device_mode_data is rsb specific, rather then slave specific, so integrate the rsb_set_device_mode() call into rsb_init(). Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Acked-by:
Ian Campbell <ijc@hellion.org.uk>
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Hans de Goede authored
Add support for the A80 to the rsb code. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Acked-by:
Ian Campbell <ijc@hellion.org.uk>
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Hans de Goede authored
CONFIG_TARGET_FOO was only used in board/sunxi/Makefile to select the dram config for sun5i and sun7i boards and in board/sunxi/gmac.c for some special handling of the bananapi/bananapro (both sun7i), all sun5i and sun7i boards have been moved over to using a single dram_sun5i_autoconfig file, and the tx clk delay handling for the Banana boards now has its own Kconfig. IOW nothing is using CONFIG_TARGET_FOO anymore, so remove it. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Acked-by:
Ian Campbell <ijc@hellion.org.uk>
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Hans de Goede authored
And use this to set the GMAC Transmit Clock Delay Chain value on Banana boards, rather then keying of CONFIG_TARGET_FOO. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Acked-by:
Ian Campbell <ijc@hellion.org.uk>
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Hans de Goede authored
Currently we've separate detailed dram settings for all sun5i boards, this moves them over to using auto dram configuration so that we can get rid of all the per board dram_foo.c files. This has been tested on a A10s-Olinuxino, A13-Olinuxino, A13-OlinuxinoM, mk802-a10s and r7-tv-dongle board. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Acked-by:
Ian Campbell <ijc@hellion.org.uk>
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Hans de Goede authored
USB1_VBUS is not used, and USB2_VBUS uses the pin normally used to control USB1_VBUS. Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
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Hans de Goede authored
We do not need i2c support in the SPL when there is no PMIC (some sun4i boards), or when the PMIC is not using i2c such as on sun6i and sun8i. This reduces the SPL size from (e.g.) 21812 to 19260 bytes. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Acked-by:
Ian Campbell <ijc@hellion.org.uk>
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- Jan 31, 2015
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git://git.denx.de/u-boot-x86Tom Rini authored
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