- Apr 14, 2017
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Heiner Kallweit authored
Enable new Meson GX MMC driver in Odroid C2 defconfig. Signed-off-by:
Heiner Kallweit <hkallweit1@gmail.com>
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Carlo Caione authored
This driver implements MMC support on Meson GX (S905) based systems. It's based on Carlo Caione's work, changes: - BLK support added - general refactoring Signed-off-by:
Carlo Caione <carlo@caione.org> Signed-off-by:
Andreas Färber <afaerber@suse.de> Signed-off-by:
Heiner Kallweit <hkallweit1@gmail.com> Tested-by:
Vagrant Cascadian <vagrant@debian.org>
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Heiner Kallweit authored
As a prerequisite for adding a Meson GX MMC driver update the Meson GXBB / Odroid-C2 device tree in Uboot with the latest version from Linux. Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Signed-off-by:
Carlo Caione <carlo@endlessm.com> Signed-off-by:
Andreas Färber <afaerber@suse.de> Signed-off-by:
Heiner Kallweit <hkallweit1@gmail.com>
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- Apr 11, 2017
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Alexey Brodkin authored
As reported in STAR 9001165532, an SLC control reg read (for checking busy state) right after SLC invalidate command may incorrectly return NOT busy causing software to NOT spin-wait while operation is underway. (and for some reason this only happens if L1 cache is also disabled - as required by IOC programming model) Suggested workaround is to do an additional Control Reg read, which ensures the 2nd read gets the right status. Same fix made in Linux kernel: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=c70c473396cbdec1168a6eff60e13029c0916854 Signed-off-by:
Alexey Brodkin <abrodkin@synopsys.com>
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- Apr 10, 2017
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Stefan Agner authored
For some reason Python 3 seems to think it does not need to build the library. Using the --force parameter makes sure that the library gets built always. This is especially important since we move the library in the next step of the Makefile, hence forcing a rebuild every time the higher level Makefile triggers a rebuild is required to make sure the library is always there. Signed-off-by:
Stefan Agner <stefan.agner@toradex.com> Acked-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
This a few minor changes down from upstream since the last sync. Signed-off-by:
Simon Glass <sjg@chromium.org>
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git://git.denx.de/u-boot-x86Tom Rini authored
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Joel Stanley authored
Since Binutils 1a9ccd70f9a7[1] u-boot will not link targets that set CONFIG_SYS_TEXT_BASE=0 with the following error: LD u-boot arm-linux-gnueabi-ld.bfd: u-boot: Not enough room for program headers, try linking with -N arm-linux-gnueabi-ld.bfd: final link failed: Bad value The issue can be reproduced with the bad binutils and the rock2_defconfig target. This issue was also encountered by the powerpc kernel[2], with the fix being to pass --no-dynamic-linker for linkers newer than 2.26 when this flag was introduced. The option tells ld that the PIE or shared lib does not need loaded program headers. Ubuntu Zesty's Binutils 2.27.51.20161202 hits this error. [1] https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commit;h=1a9ccd70f9a7 [2] https://git.kernel.org/cgit/linux/kernel/git/powerpc/linux.git/commit/?h=next&id=ff45000fcb56b5b0f1a14a865d3541746d838a0a Signed-off-by:
Joel Stanley <joel@jms.id.au> [AF: Apply to LDFLAGS_$(SPL_BIN) as well, suggested by Tom Rini] Signed-off-by:
Andreas Färber <afaerber@suse.de>
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Tom Rini authored
We disable this specific board as it does not link with the gcc-4.9.x that we use today in travis-ci. Signed-off-by:
Tom Rini <trini@konsulko.com>
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Andy Shevchenko authored
This simple PMU driver allows to tyrn power on and off for selected devices. In particularly Intel Tangier needs to power on SDHCI controllers in order to access to them during board initialization. In the future it might be expanded to cover other Intel MID platforms, that's why it's located under arch/x86/lib and called pmu.c. Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com> Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Felipe Balbi authored
Intel MID platforms have few microcontrollers inside SoC, one of them is so called System Controller Unit (SCU). Here is the driver to communicate with microcontroller. Signed-off-by:
Vincent Tinelli <vincent.tinelli@intel.com> Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com> Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by:
Simon Glass <sjg@chromium.org>
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Andy Shevchenko authored
Add a specific serial driver for Intel MID platforms. It has special fractional divider which can be programmed via UART_PS, UART_MUL, and UART_DIV registers. The UART clock is calculated as UART clock = XTAL * UART_MUL / UART_DIV The baudrate is calculated as baud rate = UART clock / UART_PS / DLAB Initialize fractional divider correctly for Intel Edison platform. For backward compatibility we have to set initial DLAB value to 16 and speed to 115200 baud, where initial frequency is 29491200Hz, and XTAL frequency is 38.4MHz. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Kever Yang <kever.yang@rock-chips.com>
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Bin Meng authored
With recent changes, some x86-specific rom tests of binman fail to run. Fix it by adding missing filenames in corresponding entries. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Stefan Roese authored
Checking 'is_zimage' at this time will always fail and therefore booting a FIT style image will always lead to this error message: "## Kernel loading failed (missing x86 kernel setup) ..." This change now removes this check and booting of FIT images works just fine. Signed-off-by:
Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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Stefan Roese authored
Now that we have added file names from Kconfig in x86 u-boot.dtsi, update binman to avoid using hard-coded names. Signed-off-by:
Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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Stefan Roese authored
Since we now have the file names configurable via Kconfig for the flash descriptor and intel-me files, add these from Kconfig in the corresponding dts nodes. Signed-off-by:
Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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Stefan Roese authored
This introduces two Kconfig options to enable board specific filenames for the Intel binary blobs to be used to generate the SPI flash image. Signed-off-by:
Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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Bin Meng authored
At present there are only 8-bit and 32-bit read/write routines in the rtc uclass driver. This adds the 16-bit support. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Andy Shevchenko authored
There is option which is not used: CONFIG_ZBOOT_32 Remove it from default x86 config and from whitelist. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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- Apr 09, 2017
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Andrew F. Davis authored
Move the OPTEE load address to 0xbdb00000 in order to avoid overlap with the memory regions used in radio and RVC usecases. Signed-off-by:
Andrew F. Davis <afd@ti.com>
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Misael Lopez Cruz authored
Move the OPTEE load address to 0xbdb00000 in order to avoid overlap with the memory regions used in radio and RVC usecases. Signed-off-by:
Misael Lopez Cruz <misael.lopez@ti.com> Signed-off-by:
Andrew F. Davis <afd@ti.com>
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Andrew F. Davis authored
Enable SPL_USB_HOST_SUPPORT in the default defconfig to allow booting from USB peripherals. Unlike the non-HS boards, we already load SPL to a 0x4030_0000+ address, so no other changes are needed. Signed-off-by:
Andrew F. Davis <afd@ti.com>
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Andrew F. Davis authored
Enable CONFIG_SPL_USBETH_SUPPORT in the default defconfig to allow booting as a USB RNDIS peripheral. Signed-off-by:
Andrew F. Davis <afd@ti.com>
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Andrew F. Davis authored
Enable Eth/Net boot support in the default defconfig to allow network booting. Signed-off-by:
Andrew F. Davis <afd@ti.com>
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Andrew F. Davis authored
Additions have been made to the non-HS defconfig without the same being made to the HS defconfig, sync them. Signed-off-by:
Andrew F. Davis <afd@ti.com>
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Andrew F. Davis authored
Additions have been made to the non-HS defconfig without the same being made to the HS defconfig, sync them. Signed-off-by:
Andrew F. Davis <afd@ti.com>
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Andrew F. Davis authored
Additions have been made to the non-HS defconfig without the same being made to the HS defconfig, sync them. Signed-off-by:
Andrew F. Davis <afd@ti.com>
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Andrew F. Davis authored
Sync new additions to non-HS defconfig with HS defconfig. Also add SPL NAND support, this was disabled before due to size constraints, enable this now at the expense of the less used GPT partition support. Signed-off-by:
Andrew F. Davis <afd@ti.com>
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Andrew F. Davis authored
FIT support in the net boot case is much like the RAM boot case in that we load our image to "load_addr" and pass a dummy read function into "spl_load_simple_fit()". As the load address is no longer hard-coded to the final execution address, legacy image loading will require load_addr to be set correctly in the image header. Signed-off-by:
Andrew F. Davis <afd@ti.com>
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Andrew F. Davis authored
TI K2G secure devices have to be built with TI_SECURE_DEVICE, FIT, and FIT_IMAGE_POST_PROCESS enabled. Add a dedicated defconfig for this. Signed-off-by:
Andrew F. Davis <afd@ti.com>
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Andrew F. Davis authored
TI K2HK secure devices have to be built with TI_SECURE_DEVICE, FIT, and FIT_IMAGE_POST_PROCESS enabled. Add a dedicated defconfig for this. Signed-off-by:
Andrew F. Davis <afd@ti.com>
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Vitaly Andrianov authored
TI K2E secure devices have to be built with TI_SECURE_DEVICE, FIT, and FIT_IMAGE_POST_PROCESS enabled. Add a dedicated defconfig for this. Signed-off-by:
Vitaly Andrianov <vitalya@ti.com> Signed-off-by:
Madan Srinivas <madans@ti.com> Signed-off-by:
Andrew F. Davis <afd@ti.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Madan Srinivas authored
This patch makes SYS_TEXT_BASE a config option for Keystone2 so that it can be used to load u-boot at different addresses on secure and non-secure Keystone2 devices. Signed-off-by:
Madan Srinivas <madans@ti.com> Signed-off-by:
Andrew F. Davis <afd@ti.com> Reviewed-by:
Tom Rini <trini@konsulko.com> Reviewed-by:
Lokesh Vutla <lokeshvutla@ti.com>
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Madan Srinivas authored
Add a section describing the secure boot image used on Keystone2 secure devices. Signed-off-by:
Madan Srinivas <madans@ti.com> Signed-off-by:
Andrew F. Davis <afd@ti.com> Reviewed-by:
Tom Rini <trini@konsulko.com> Reviewed-by:
Lokesh Vutla <lokeshvutla@ti.com>
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Madan Srinivas authored
Adds an additional image type needed for supporting secure keystone devices. The build generates u-boot_HS_MLO which can be used to boot from all media on secure keystone devices. Signed-off-by:
Madan Srinivas <madans@ti.com> Signed-off-by:
Andrew F. Davis <afd@ti.com> Reviewed-by:
Tom Rini <trini@konsulko.com> Reviewed-by:
Lokesh Vutla <lokeshvutla@ti.com>
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Madan Srinivas authored
As K2 can directly boot U-Boot, add u-boot_HS_MLO as the secure image name for secure K2 devices, for all boot modes other than SPI flash. Signed-off-by:
Madan Srinivas <madans@ti.com> Signed-off-by:
Andrew F. Davis <afd@ti.com> Reviewed-by:
Tom Rini <trini@konsulko.com> Reviewed-by:
Lokesh Vutla <lokeshvutla@ti.com>
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Vitaly Andrianov authored
Like the OMAP54xx, AM43xx, & AM33xx family SoCs, the keystone family of SoCs also have high security enabled models. Allow K2E devices to be built with HS Device Type Support. Signed-off-by:
Vitaly Andrianov <vitalya@ti.com> Signed-off-by:
Madan Srinivas <madans@ti.com> Signed-off-by:
Andrew F. Davis <afd@ti.com> Reviewed-by:
Tom Rini <trini@konsulko.com> Reviewed-by:
Lokesh Vutla <lokeshvutla@ti.com>
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Vitaly Andrianov authored
This commit implements the board_fit_image_post_process() function for the keystone architecture. This function calls into the secure boot monitor for secure authentication/decryption of the image. All needed work is handled by the boot monitor and, depending on the keystone platform, the security functions may be offloaded to other secure processing elements in the SoC. The boot monitor acts as the gateway to these secure functions and the boot monitor for secure devices is available as part of the SECDEV package for KS2. For more details refer doc/README.ti-secure Signed-off-by:
Vitaly Andrianov <vitalya@ti.com> Signed-off-by:
Madan Srinivas <madans@ti.com> Signed-off-by:
Andrew F. Davis <afd@ti.com> Reviewed-by:
Tom Rini <trini@konsulko.com> Reviewed-by:
Lokesh Vutla <lokeshvutla@ti.com>
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Madan Srinivas authored
The function 'board_fit_image_post_process' is defined only when the config option CONFIG_FIT_IMAGE_POST_PROCESS is enabled. For secure systems that do not use SPL but do use FIT kernel images, only CONFIG_FIT_IMAGE_POST_PROCESS will be defined, which will result in an implicit declaration of function 'board_fit_image_post_process' warning while building u-boot. Fix this warning. Signed-off-by:
Madan Srinivas <madans@ti.com> Signed-off-by:
Andrew F. Davis <afd@ti.com> Reviewed-by:
Tom Rini <trini@konsulko.com> Reviewed-by:
Lokesh Vutla <lokeshvutla@ti.com>
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Andrew F. Davis authored
The most common name for a FIT image containing a bootable kernel is "fitImage", as our builds now use this name also, change this to the default in our U-Boot environment. Signed-off-by:
Andrew F. Davis <afd@ti.com>
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