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  • Florian Mayer Florian Mayer fmayer
1 author
  1. Jan 09, 2017
  3. Jan 08, 2017
    • Jagan Teki's avatar
      mx6ullevk: Add missing MAINTAINERS for mx6ull_14x14_evk_plugin_defconfig · a8eac0ac
      Jagan Teki authored 
      
Add 'Peng Fan' as MAINTAINERS of configs/mx6ull_14x14_evk_plugin_defconfig
which is missing in below commit
"imx: mx6ull_14x14_evk: add plugin defconfig"
(sha1: b90ebf49)

Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: default avatarPeng Fan <peng.fan@nxp.com>
Signed-off-by: default avatarJagan Teki <jagan@openedev.com>
      a8eac0ac
    • Andrew F. Davis's avatar
      am335x: configs: Use ISW_ENTRY_ADDR to set SPL_TEXT_BASE · 4d82c4b5
      Andrew F. Davis authored 
      
The SPL load address changes based on boot type in HS devices,
ISW_ENTRY_ADDR is used to set this address for AM43xx based SoCs
for similar reasons. Add this same logic for AM33xx devices.

Also make the default value for ISW_ENTRY_ADDR correct for GP
devices based on SoC, HS devices already pick the correct
value in their defconfig.

Signed-off-by: default avatarAndrew F. Davis <afd@ti.com>
      4d82c4b5
    • Andrew F. Davis's avatar
      arm: mach-omap2: Fix secure file generation · 7410f146
      Andrew F. Davis authored 
      
When TI_SECURE_DEV_PKG is not defined we warn that the file '*_HS' was
not generated but generate an unsigned one anyway, first fix this
warning to say that it was generated but not secured.

When the user then exports TI_SECURE_DEV_PKG after getting this warning,
and tries to re-build, 'make' will detect the build artifacts as
unchanged and so assume they do not need to be re-generated. This causes
it to fail to sign the files and it will pack unsigned files into the
final image, even though TI_SECURE_DEV_PKG is now correctly defined and
working.

Fix this by using FORCE on the targets causes them to be re-run even if
the dependent files have not changed.

This then causes another issue. We currently rename the signed dtb files
to overwrite the non-signed ones. We do this so the 'mkimage' tool gives
the packaged dtb sections the correct name. If we do not rename the files
then SPL will not find them during boot.

Fix this by renaming the dtb files by appending _HS to the end of the
filename, after the ".dtb", this causes them to still be named correctly
in the FIT blob.

Signed-off-by: default avatarAndrew F. Davis <afd@ti.com>
      7410f146
  5. Jan 05, 2017
  7. Jan 04, 2017
    • Jagan Teki's avatar
      mtd: nand: mxs_nand_spl: Fix to remove twise 'NAND' print · 101000b7
      Jagan Teki authored 
      
SPL from nand will print 'NAND' in boot_from_devices based on
the image_loader name, remove the extra 'NAND ' in mxs_nand_spl driver.

Original behaviour:
-------------------
U-Boot SPL 2017.01-rc2-gf84dd8b (Jan 02 2017 - 22:24:19)
Trying to boot from NANDNAND : 512 MiB

After the fix:
-------------
U-Boot SPL 2017.01-rc2-gf84dd8b-dirty (Jan 02 2017 - 23:17:00)
Trying to boot from NAND: 512 MiB

Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: default avatarJagan Teki <jagan@openedev.com>
      101000b7
    • Vignesh R's avatar
      spi: cadence_qspi_apb: Use 32 bit indirect read transaction when possible · b63b4631
      Vignesh R authored 
      
According to Section 11.15.4.9.1 Indirect Read Controller of K2G SoC
TRM SPRUHY8D[1], the external master is only permitted to issue 32-bit
data interface reads until the last word of an indirect transfer
So, make sure that QSPI indirect reads are 32 bit sized except for the
final read. If the rxbuf is unaligned then use bounce buffer, so that
readsl() can be used instead of readsb() to avoid non 32-bit accesses.

[1]www.ti.com/lit/ug/spruhy8d/spruhy8d.pdf

Signed-off-by: default avatarVignesh R <vigneshr@ti.com>
Reviewed-by: default avatarMarek Vasut <marex@denx.de>
Reviewed-by: default avatarJagan Teki <jagan@openedev.com>
      b63b4631
    • Vignesh R's avatar
      spi: cadence_qspi_apb: Use 32 bit indirect write transaction when possible · 57897c13
      Vignesh R authored 
      
According to Section 11.15.4.9.2 Indirect Write Controller of K2G SoC
TRM SPRUHY8D[1], the external master is only permitted to issue 32-bit
data interface writes until the last word of an indirect transfer
otherwise indirect writes is known to fails sometimes. So, make sure
that QSPI indirect writes are 32 bit sized except for the last write. If
the txbuf is unaligned then use bounce buffer to avoid data aborts.

So, now that the driver uses bounce_buffer, enable CONFIG_BOUNCE_BUFFER
for all boards that use Cadence QSPI driver.

[1]www.ti.com/lit/ug/spruhy8d/spruhy8d.pdf

Signed-off-by: default avatarVignesh R <vigneshr@ti.com>
Reviewed-by: default avatarMarek Vasut <marex@denx.de>
Reviewed-by: default avatarJagan Teki <jagan@openedev.com>
      57897c13
  9. Jan 03, 2017