- Nov 25, 2014
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Hans de Goede authored
Old kernels cannot handle booting in non-secure (hyp) mode, so when OLD_SUNXI_KERNEL_COMPAT is set, also set ARMV7_BOOT_SEC_DEFAULT. Note that whether to booting secure or non-secure can always be overriden using the bootm_boot_mode environment variable. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Acked-by:
Ian Campbell <ijc@hellion.org.uk>
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Hans de Goede authored
Hookup the gmac found on the sun6i / A31 SoCs. Signed-off-by:
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Hans de Goede authored
If the target power is connected through a gpio, then give the target some time to power up before continuing with ahci / sata probing, this avoids link timeouts, without penalizing other boards where there is no target power gpio. Why 500 ms ? I started with 200, that was not enough, then I went to 500 which worked, lowering it to 350 broke things again, so 500 seems the minimum my vertex2 needs to be ready to get probed. Signed-off-by:
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Hans de Goede authored
For use together with the hdmi console. Signed-off-by:
Ian Campbell <ian.campbell@citrix.com>
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Luc Verhaegen authored
Add simplefb support, note this depends on the kernel having support for the clocks property which has recently been added to the simplefb devicetree binding. Signed-off-by:
Luc Verhaegen <libv@skynet.be> [hdegoede@redhat.com: Use pre-populated simplefb node under /chosen as disussed on the devicetree list] Signed-off-by:
Ian Campbell <ijc@hellion.org.uk>.>
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Luc Verhaegen authored
This adds a fixed mode hdmi driver for the sunxi platform. The fixed mode is a relatively safe 1024x768, more complete EDID handling is currently not provided. Only HDMI is supported today. This code is enabled when HPD detects an attached monitor. Current config is such that 8MB is shaved off at the top of the RAM. This avoids several memory handling issues, most significant is the fact that on linux on ARM you are not allowed to remap known RAM as IO. A clued in display driver will be able to recycle this reserved RAM in future though. cfbconsole was chosen as it provides the most important functionality: a working u-boot console, allowing for the debugging of certain issues without the need for a UART. Signed-off-by:
Anatolij Gustschin <agust@denx.de> Acked-by:
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- Nov 24, 2014
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Alison Wang authored
EC1 pins in RCW can be selected as RGMII1, GPIO3, CAN1/2, FTM1 or SAI1/2. There is a bug that EC3 RGMII could not work when selecting EC1 as other functionality except RGMII. The workaround is to select ge2_clk125 for eTSEC clock muxing in register SCFG_ETSECCMCR. Signed-off-by:
Alison Wang <alison.wang@freescale.com> Reviewed-by:
York Sun <yorksun@freescale.com>
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Alison Wang authored
SystemID information could be read through I2C1 from EEPROM on LS1021ATWR board. As LS1 is a little-endian processor, getting the version ID by be32_to_cpu() is wrong. Fix it by using e.version directly. This change will be compatible for both ARM and PowerPC. As there is an errata that I2C1 could not work in SD boot, reading EEPROM through I2C1 is disabled too in SD boot. Signed-off-by:
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Alison Wang authored
SCFG_SCFGREVCR is SCFG bit reverse register. This register must be written with 0xFFFFFFFF before writing to any other SCFG register. Then other SCFG register could be written in big-endian mode. Address: 157_0000h base + 200h offset = 157_0200h Bit 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15|16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 W/R SCFGREV Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0-31 SCFGREV SCFG Bit Reverse Control Filed 32'h 0000_0000 - No bit reverse is applied 32'h FFFF_FFFF - Bit reverse is applied; so 31:0 will be stored/read as 0:31 This patch removes the bit reversing for SCFG registers in u-boot. It will be implemented through PBI commands in RCW .pbi write 0x570200, 0xffffffff .end So other SCFG register could be written in big-endian mode in u-boot or kernel directly. Signed-off-by:
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Jason Jin authored
Disable the snoop for slave interface 0, 1 and 2 to avoid the interleaving on the CCI400 BUS. Signed-off-by:
Jason Jin <Jason.Jin@freescale.com> Signed-off-by:
Minghuan Lian <Minghuan.Lian@freescale.com> Reviewed-by:
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When an invalid USDHC port is passed we should return -EINVAL instead of 0. Also, return the error immediately on fsl_esdhc_initialize() failure. Cc: Eric Benard <eric@eukrea.com> Signed-off-by:Fabio Estevam <fabio.estevam@freescale.com>
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When an invalid USDHC port is passed we should return -EINVAL instead of 0. Also, return the error immediately on fsl_esdhc_initialize() failure. Cc: Eric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: -
When an invalid USDHC port is passed we should return -EINVAL instead of 0. Also, return the error immediately on fsl_esdhc_initialize() failure. Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Signed-off-by: -
Provide board specific implementation for sata stop command for cm_fx6. Signed-off-by:Nikita Kiryanov <nikita@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de>
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gw_ventana can boot from SPI or NAND and both of these interfaces boot from the same 0x400 offset. This means that we could simplify the code and replace the custom gw_ventana.cfg with the generic spl_sd.cfg, as it provides the same boot offset of 0x400. Cc: Tim Harvey <tharvey@gateworks.com> Signed-off-by: -
Hans de Goede authored
Add arch/arm/cpu/armv7/Kconfig with non-secure and virt options, this is a preparation patch for adding an env variable to choose between secure / non-secure boot on non-secure boot capable systems, specifically this prepares for adding CONFIG_ARMV7_BOOT_SEC_DEFAULT as a proper Kconfig option. Signed-off-by: -
Suriyan Ramasami authored
To indicate that U-Boot is active, turn on the blue LED. Signed-off-by:
Suriyan Ramasami <suriyan.r@gmail.com> Acked-by:
Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by:
Minkyu Kang <mk7.kang@samsung.com>
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Suriyan Ramasami authored
The USB host code was missing gpio_request() calls before using the gpio functions, causing errors to be printed out. As a side note calls to max77686_set_buck_mode(OPMODE_OFF/OPMODE_ON) have been removed, as they did not have any effect. This is as per Przemyslaw: I looked into the documentation and there is a "ENB8" pin in PMIC package. This pin allows steering BUCK8 ON/OFF by the hardware. If ENB8 is set to low then you can do on/off. If high, then you cannot change its state by I2C write, which seems to be the case with the Odroids. Signed-off-by:
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- Nov 23, 2014
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Suriyan Ramasami authored
The sandbox/ext4/fat/generic fs commands do not gracefully deal with files greater than 2GB. Negative values are returned in such cases. To handle this, the fs functions have been modified to take an additional parameter of type "* loff_t" which is then populated. The return value of the fs functions are used only for error conditions. Signed-off-by:
Simon Glass <sjg@chromium.org> [trini: Update board/gdsys/p1022/controlcenterd-id.c, drivers/fpga/zynqpl.c for changes] Signed-off-by:
Tom Rini <trini@ti.com>
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Suriyan Ramasami authored
Change the internal FAT functions to use loff_t for offsets. Signed-off-by:
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Tom Rini authored
A number of prototypes here are now found in <flash.h>. use. Signed-off-by: -
Masahiro Yamada authored
Some CPUs of some architectures have SOC directories. At present, the build system directly descends into SOC directories from the top Makefile, but it should generally descend into each directory from its parent directory. Signed-off-by:Masahiro Yamada <yamada.m@jp.panasonic.com>
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Steve Rae authored
bcm11130 bcm11130_nand Signed-off-by:Steve Rae <srae@broadcom.com>
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Steve Rae authored
bcm911360_entphn bcm911360_entphn-ns bcm911360k bcm958300k-ns bcm958305k - updates to support Cygnus and NSP board families better - add functions so CONFIG_ARMV7_NONSEC can be enabled on Cygnus boards Signed-off-by: -
Masahiro Yamada authored
U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by:
Pavel Machek <pavel@denx.de> Acked-by:
Lukasz Majewski <l.majewski@samsung.com> Tested-by:
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- Nov 21, 2014
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When an invalid USDHC port is passed we should return -EINVAL instead of 0. Also, return the error immediately on fsl_esdhc_initialize() failure. Signed-off-by: -
When an invalid USDHC port is passed we should return -EINVAL instead of 0. Also, return the error immediately on fsl_esdhc_initialize() failure. Signed-off-by: -
When an invalid USDHC port is passed we should return -EINVAL instead of 0. Also, return the error immediately on fsl_esdhc_initialize() failure. Signed-off-by: -
When an invalid USDHC port is passed we should return -EINVAL instead of 0. Also, return the error immediately on fsl_esdhc_initialize() failure. Signed-off-by: -
When an invalid USDHC port is passed we should return -EINVAL instead of 0. Also, return the error immediately on fsl_esdhc_initialize() failure. Signed-off-by: -
When an invalid USDHC port is passed we should return -EINVAL instead of 0. Also, return the error immediately on fsl_esdhc_initialize() failure. Based on similar patches by Fabio Estevam for mx6sabresd, mx53loco, wandboard Signed-off-by:
Soeren Moch <smoch@web.de> Acked-by:
Stefano Babic <sbabic@denx.de>
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Simon Glass authored
Add platform data for the GPIO driver. It doesn't need to contain anything since the GPIO driver will actually use information from the CONFIGs for now. This merely serves to ensure that the GPIO driver is bound. Signed-off-by: -
Simon Glass authored
The old maintainer has left, so take this over. Signed-off-by: -
Simon Glass authored
Convert this at91sam9260-based board to use driver model. This should serve as an example for other similar boards. Serial and GPIO are supported so far. Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Simon Glass authored
Rename this vendor since it is intended to be used on any platform where coreboot runs at reset and then loads U-Boot. So far it is only tested on link. When other boards are supported it is likely that we will need to move to multiple board names, all under the 'coreboot' vendor. So while it would be possible to remove the vendor for now, that would be short-sighted. Suggested-by:
Bin Meng <bmeng.cn@gmail.com> Signed-off-by:
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Simon Glass authored
Enable GPIO support and provide the required GPIO setup information to the driver. Signed-off-by: -
Simon Glass authored
Add support for CAR so that we have memory to use prior to DRAM init. On link there is a total of 128KB of CAR available, although some is used for the memory reference code. Signed-off-by: -
Simon Glass authored
On x86 it is common to use 'post codes' which are 8-bit hex values emitted from the code and visible to the user. Traditionally two 7-segment displays were made available on the motherboard to show the last post code that was emitted. This allows diagnosis of a boot problem since it is possible to see where the code got to before it died. On modern hardware these codes are not normally visible. On Chromebooks they are displayed by the Embedded Controller (EC), so it is useful to emit them. We must enable this feature for the EC to see the codes, so add an option for this. Signed-off-by:
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Simon Glass authored
This board is a 'bare' version of the existing 'link 'board. It does not require coreboot to run, but is intended to start directly from the reset vector. This initial commit has place holders for a wide range of features. These will be added in follow-on patches and series. So far it cannot be booted as there is no ROM image produced, but it does build without errors. Signed-off-by: -
Simon Glass authored
Use these new functions where possible. They default to a value of 2 so we cannot use them in some places where we need a default value of 1. Signed-off-by:
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