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Commit 6248f68c authored by Eberhard Stoll's avatar Eberhard Stoll
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stm32mp-t1000: Fix clock configuration

Fix some overclocking for SAI interfaces. Also some clock
configurations are improved. Changed clocks are:

- SAI1 to SAI4
- UART1
- UART78
- SDMMC3
parent edcf5045
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1 merge request!3stm32mp-t1000: Fix clock configuration
...@@ -123,23 +123,23 @@ ...@@ -123,23 +123,23 @@
CLK_SPI45_HSI CLK_SPI45_HSI
CLK_SPI6_HSI CLK_SPI6_HSI
CLK_I2C46_HSI CLK_I2C46_HSI
CLK_SDMMC3_PLL4P CLK_SDMMC3_HCLK2
CLK_USBO_USBPHY CLK_USBO_USBPHY
CLK_ADC_CKPER CLK_ADC_CKPER
CLK_CEC_LSE CLK_CEC_LSE
CLK_I2C12_HSI CLK_I2C12_HSI
CLK_I2C35_HSI CLK_I2C35_HSI
CLK_UART1_HSI CLK_UART1_HSE
CLK_UART24_PCLK1 CLK_UART24_PCLK1
CLK_UART35_HSI CLK_UART35_HSI
CLK_UART6_PCLK2 CLK_UART6_PCLK2
CLK_UART78_HSI CLK_UART78_PCLK1
CLK_SPDIF_PLL3Q CLK_SPDIF_PLL3Q
CLK_FDCAN_HSE CLK_FDCAN_HSE
CLK_SAI1_PLL3Q CLK_SAI1_PLL4Q
CLK_SAI2_PLL3Q CLK_SAI2_PLL4Q
CLK_SAI3_PLL3Q CLK_SAI3_PLL4Q
CLK_SAI4_PLL3Q CLK_SAI4_PLL4Q
CLK_RNG1_CSI CLK_RNG1_CSI
CLK_RNG2_CSI CLK_RNG2_CSI
CLK_LPTIM1_PCLK1 CLK_LPTIM1_PCLK1
......
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