stm32mp1: check DDR ASR/SSR modes support

Add a platform function to know if Software/Automatic Self-Refresh is
supported.

Change-Id: Ie20dd21c25ef3dd4c56bb9fe10c7e9b14b190134
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/153156


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: CIBUILD <smet-aci-builds@lists.codex.cro.st.com>
Reviewed-by: Etienne CARRIERE <etienne.carriere@st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>

plat/st/common/include/stm32mp_common.h

@@ -27,6 +27,9 @@ uintptr_t stm32mp_ddrctrl_base(void);
 /* Return the base address of the DDR PHY */
 uintptr_t stm32mp_ddrphyc_base(void);
 
+/* Check DDR Software/Automatic Self-Refresh support */
+bool stm32mp_ddr_supports_ssr_asr(void);
+
 /* Return the base address of the PWR peripheral */
 uintptr_t stm32mp_pwr_base(void);
 

plat/st/stm32mp1/stm32mp1_private.c

@@ -612,6 +612,15 @@ bool stm32mp_is_single_core(void)
 	}
 }
 
+/* Return true if DDR supports Software/Automatic Self-Refresh */
+bool stm32mp_ddr_supports_ssr_asr(void)
+{
+	uintptr_t ddrctrl_base = stm32mp_ddrctrl_base();
+	uint32_t mstr = mmio_read_32(ddrctrl_base + DDRCTRL_MSTR);
+
+	return (mstr & DDRCTRL_MSTR_LPDDR2) != 0U;
+}
+
 /* Return true when device is in closed state */
 bool stm32mp_is_closed_device(void)
 {