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Commit cffa7c27 authored by Yann Gautier's avatar Yann Gautier Committed by Sebastien Pasdeloup
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ddr: stm32mp1_ddr: correct SELFREF_TO_X32 mask


In DDR controller PWRTMG register, the mask for field SELFREF_TO_X32 is
wrong. This field is from bit 16 to 23.

Change-Id: Id336fb08c88f0a153df186dd819e41af72febb88
Signed-off-by: default avatarYann Gautier <yann.gautier@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/192783


Reviewed-by: default avatarCITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: default avatarCIBUILD <MDG-smet-aci-builds@list.st.com>
Reviewed-by: default avatarLionel DEBIEVE <lionel.debieve@st.com>
Reviewed-by: default avatarYann GAUTIER <yann.gautier@foss.st.com>
Tested-by: default avatarYann GAUTIER <yann.gautier@foss.st.com>
parent 1f35b447
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/*
* Copyright (c) 2017-2019, STMicroelectronics - All Rights Reserved
* Copyright (c) 2017-2021, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
*/
......@@ -290,7 +290,7 @@ struct stm32mp1_ddrphy {
#define DDRCTRL_PWRCTL_EN_DFI_DRAM_CLK_DISABLE BIT(3)
#define DDRCTRL_PWRCTL_SELFREF_SW BIT(5)
#define DDRCTRL_PWRTMG_SELFREF_TO_X32_MASK GENMASK(19, 12)
#define DDRCTRL_PWRTMG_SELFREF_TO_X32_MASK GENMASK(23, 16)
#define DDRCTRL_PWRTMG_SELFREF_TO_X32_0 BIT(16)
#define DDRCTRL_RFSHCTL3_DIS_AUTO_REFRESH BIT(0)
......
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