- Feb 11, 2021
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Nicolas Toromanoff authored
Correct the warning due to compare signed and non signed variable. Signed-off-by:
Nicolas Toromanoff <nicolas.toromanoff@st.com> Change-Id: Ic12527f5f92a34e925bee3047c168eacf5e99d8a Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/189410 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
Lionel DEBIEVE <lionel.debieve@st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com>
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Yann Gautier authored
If the DDR is not in self-refresh, the PWR DDR retention bits should be cleared, whatever the status of PWR_CR3_DDRRETEN. This can happen in case of STANDBY with DDR of, if the DDR has not been set in Self Refresh. Change-Id: If8854b06ad4d2a8d0bf6e227c411efcdcd4b004a Signed-off-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Sebastien PASDELOUP <sebastien.pasdeloup-ext@st.com>
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Lionel Debieve authored
In case of SP_MIN in DDR, the wrapper in BL2 uses the iwdg clock for a watchdog refresh. Because it uses the BL2 stacks, the clock counter is not correct and the watchdog clocks are not properly restored. Signed-off-by:
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Lionel Debieve authored
Add a new function to control the MCU subsystem security state. Signed-off-by:
Gabriel FERNANDEZ <gabriel.fernandez@st.com> Reviewed-by:
Etienne CARRIERE <etienne.carriere@st.com> Reviewed-by:
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Lionel Debieve authored
From the new binding, the RCC become secured based on the new compatible. This must be done only from the secure OS initialisation. Signed-off-by:
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Nicolas Le Bayon authored
Add read/write functions for BSEC scratch register, used for communication with external agent, and to store boot parameters. Change-Id: If024bcce127c829d8a663df0119f0e908712405e Signed-off-by:
Nicolas Le Bayon <nicolas.le.bayon@st.com> Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/187860 Reviewed-by:
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Nicolas Le Bayon authored
Checking written value is useless, as local variables. Set function type to void. Change-Id: I5ecad094c2c91a2d5a233addbaba5f76c70eab20 Signed-off-by:
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Lionel Debieve authored
Rework the early interrupt to dump core registers in debug mode. In release mode, it will clear the interrupt and wait watchdog to expire. Signed-off-by:
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Lionel Debieve authored
Fix MISRA issues and invert the spi_nor_ready status to improve readability. Signed-off-by:
Christophe KERELLO <christophe.kerello@st.com> Reviewed-by:
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Lionel Debieve authored
Invert test logic on the status register control to fix issue when the bit SR_QUAD_EN_MX is not set. Signed-off-by:
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Nicolas Toromanoff authored
A platform specific mebedtls_config.h can now be defined if needed by the parent makefile. Signed-off-by:
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Nicolas Toromanoff authored
with platform format PK In some platform the digest of the public key saved in the OTP is not the the digest of the exact same public key buffer needed to check the signature. Typically, check signature may need a BER encapsulated public key, but the hash saved in OTP may be the hash of the plain public key. Add a new platform weak function to transform the public key buffer used by verify_signature to a buffer which hash is saved in OTP. Signed-off-by:
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Lionel Debieve authored
Move the fw_config authentication structure into the common part. Without BL1, the fw_config will be added into the BL2 firmware. It will be loaded from FIP and authenticated in BL2. Signed-off-by:
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Lionel Debieve authored
Add the system reset management into the stm32mp reset driver. Signed-off-by:
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Yann Gautier authored
When retrieving data from stm32 image file, the header is removed with a memcpy that shifts the data to overwrite the useless header for next binary. STM32 binary from boot device: |-------------------------------------| | header | payload | |-------------------------------------| After the memcpy: |-------------------------------------| | payload | remain | |-------------------------------------| But the remaining data after the shifted payload is still in the cache. As it is of no use for anyone, just invalidate the cache at this address. Change-Id: Ice2af3b1ca49eccb79bfc62db60437e259d344ca Signed-off-by:
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Gabriel Fernandez authored
Change call of: stm32mp_clk_enable() / stm32mp_clk_disable() / stm32mp_clk_get_rate() by clk_enable() / clk_disable() / clk_get_rate() Change-Id: I15d2ce57b9499211fa522a1b53eeee9cf584c111 Signed-off-by:
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Gabriel Fernandez authored
Introduce a minimal clock framework. Change-Id: I5119a2aeaf103ceaae7a60d9e423caf0c148d794 Signed-off-by:
Ludovic Barre <ludovic.barre@st.com> Signed-off-by:
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Yann Gautier authored
To avoid parsing device tree file too often, keep the RCC node offset value in a variable in fdt_get_rcc_node(). Change-Id: Ibb23ff92247d57c65a23517b8f3473f639794d2a Signed-off-by:
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- Feb 05, 2021
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Lionel Debieve authored
Remove access and check linked to backup register. RAM must focus on DDR self refresh status based on the wake-up state. Add a new export function to inform about the self refresh state. Signed-off-by:
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Lionel Debieve authored
Add a new function that allows to enable or disabled filters on configured regions dynamically. This will avoid to reconfigure the entire attribute and just manage to enable/disable filters. Signed-off-by:
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Yann Gautier authored
A new flag STM32MP_DDR_DUAL_AXI_PORT is added, and enabled by default. It will allow choosing single or dual AXI ports for DDR. Change-Id: I48826a66a6f4d18df87e081c0960af89ddda1b9d Signed-off-by: -
Yann Gautier authored
Change-Id: I6486de200ddde5526fe64f4be8cb85fa3fe89431 Signed-off-by: -
Yann Gautier authored
Call directly stm32mp_stgen_get_counter() in stm32mp_stgen_config(). Change-Id: I9227b51cb86d400ba30cc6ef65f968d5f4f5a126 Signed-off-by: -
Yann Gautier authored
This function is under LOG_LEVEL_VERBOSE flag, to help debugging clocks. Change-Id: I4a898c883bbecff8ebfaff156c97947e51697f03 Signed-off-by: -
Lionel Debieve authored
Avoid possible lock when the capture is not stable. Base the capture value to a define threshold. Signed-off-by:
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Yann Gautier authored
Use errno values, or the return of called functions, instead of -1. Change-Id: If7b53de5cbfb4d2c9979bce0e594dd92bf07a77a Signed-off-by:
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Yann Gautier authored
A variable hdr_sz is created in stm32image_partition_read() function. It just represents the size of the stm32 image header but it really increases the readability of the function. Change-Id: I95ec62a78a4b6c6a75b0d8c8aa0faef8bee424da Signed-off-by:
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Lionel Debieve authored
The backup partition will be checked only by the default load process. It is removed from io_stm32image.c to clarify the load processing. Signed-off-by:
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Benjamin Gaignard authored
Make sure that i2c->i2c_state is correctly initialized with I2C_STATE_RESET value this avoid hi2c->lock to not be set to 0 when calling stm32_i2c_init during platform suspend/resume operations. Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@st.com> Change-Id: I3b4c1f9115589325eb256789a1764c322741db7d Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/161037 Reviewed-by:
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Lionel Debieve authored
Enable TRUSTED_BOARD_BOOT. This change removes calls to stm32mp_check_header() and stm32mp_auth_image() when boot images are loaded since images are now verified from the authentication framework. Change-Id: Iec5b645e1581543c99ae59bdb4dd033c577f2295 Signed-off-by:
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- Jan 13, 2021
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Nicolas Le Bayon authored
dt_pmic_find_supply() finds in the FDT the supply name related to a regulator name. pmic_set_regulator_min_voltage() sets target supply to its min voltage specified in the FDT by property "regulator-min-microvolt". Change-Id: Ic5fcabb7b2353deb1af20b7cc76e5bceca70bc77 Signed-off-by:
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Nicolas Le Bayon authored
In pmic_operate(), "regulators" node value must be checked before entering in the fdt_for_each_subnode loop. Change-Id: I1460cd24ec56ec47ab644f396b71b92973e75fb4 Signed-off-by:
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Nicolas Le Bayon authored
Define DDR Self Refresh (SR) mode read/set/save/restore API functions. At the end of DDR initialization in BL2, switch SR mode to the one indicated by DDR updated registers. Save mode at BL32 init. When entering in cstop/cstandby, switch to SSR (Software). When exiting, go back to the saved mode. Change-Id: Iadd795d20fdea2d7be30c1ba6f02eb172e33f4b1 Signed-off-by: -
Nicolas Le Bayon authored
DDR Self Refresh mode capabilities are related to DDR settings defined in DT and not to DDR type. So remove checking this before executing a Self Refresh mode transition. Change-Id: I3e0b55304044de323f72fe12ee0d6fc9e191c183 Signed-off-by:
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Yann Gautier authored
This was previously done in ddr_standby_sr_entry(). It is now done as a separate function. This will ease the DDR Self-Refresh entry for platforms having monitor in DDR. Change-Id: I69ccf0f33d20584579626b973a4295ede351a803 Signed-off-by:
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Yann Gautier authored
AXI, MPU and MCU clocks are always on, put them in the list in the function clock_is_always_on(). Change-Id: I969a442274d2da6c59636f3293de1c31b4c8e3b1 Signed-off-by: -
Yann Gautier authored
The function stm32mp1_clk_init() returns an int. Return an error value if the device tree is not found. Change-Id: I422d5fea46c4d63d55a5b62e1db154c1f53f41b7 Signed-off-by: -
Gabriel Fernandez authored
Instead of transmitting an 'enum stm32mp_osc_id', just send directly the clock name with a 'const char *' Change-Id: I866b05cbb1685a9b9f80e63dcd5ba7b1d35fc932 Signed-off-by:
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Gabriel Fernandez authored
Don't switch to MPUDIV/PLL1P in suspend/resume mode. Non-secure is in charge of requesting MPU lowest OPP when suspending. Change-Id: Iad47122c25d6f03247b7754a77e8d415c3720850 Signed-off-by: -
Gabriel Fernandez authored
When non-secure OS asks for a change of the MPU frequency,check that MPU divider can be used, instead of changing the VCO of the PLL. Change-Id: I3ceda67731705376952cc2a395a525393f00554e Signed-off-by:
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