Move the fw_config authentication structure into the common part.
Without BL1, the fw_config will be added into the BL2 firmware.
It will be loaded from FIP and authenticated in BL2.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I3b8f8e99961d28d3d15a6dbff06b0d9cdda20881
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/184832


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: Nicolas TOROMANOFF <nicolas.toromanoff@st.com>
Reviewed-by: CIBUILD <smet-aci-builds@lists.codex.cro.st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>
Tested-by: Nicolas TOROMANOFF <nicolas.toromanoff@st.com>

Call the stm32mp_system_reset from the driver for the
PSCI ops.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I0968d7b71138635e16dc95ed2692ff78830f095c
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/184413


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: CIBUILD <smet-aci-builds@lists.codex.cro.st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>

Add the system reset management into the stm32mp
reset driver.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I748f10de2398e1323160f479f99e92abd2f65dca
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/184412


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: Gabriel FERNANDEZ <gabriel.fernandez@st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>

TZC400 configuration is applied at the end of BL2 after MMU and data
cache being turned off. Configuration needs to retrieve the DDR size
to generate the correct region.
Access to the size fails because the value is still in
the data cache. Flushing the size is mandatory.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: Ib92c4c29f856638d479bb0600cebe2bb7de15312
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/184733


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>
Reviewed-by: CIBUILD <smet-aci-builds@lists.codex.cro.st.com>

Move PWR related init from bl2 to bl32.

Change-Id: I61b62ef2208bee0e502dd5fab277d806c205e7b1
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/183647


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>
Tested-by: Yann GAUTIER <yann.gautier@st.com>

The flush of the BL33 image is already handled in load_image().
For ED1/EV1 boards, this extra flush was also doing nothing, as for
those boards image_base + image_max_size = 0x100000000, which overflows
an u32, and 0 was used.
This flush is now replaced with a correct invalidation of the cache
directly in io_stm32image.

Change-Id: Ibe301e017669b10d8c321abef27c674c914e43b6
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/183678


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>

When retrieving data from stm32 image file, the header is removed with
a memcpy that shifts the data to overwrite the useless header for next
binary.

STM32 binary from boot device:
|-------------------------------------|
| header | payload                    |
|-------------------------------------|

After the memcpy:
|-------------------------------------|
| payload                    | remain |
|-------------------------------------|

But the remaining data after the shifted payload is still in
the cache. As it is of no use for anyone, just invalidate the cache
at this address.

Change-Id: Ice2af3b1ca49eccb79bfc62db60437e259d344ca
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/183677


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: CIBUILD <smet-aci-builds@lists.codex.cro.st.com>
Reviewed-by: Lionel DEBIEVE <lionel.debieve@st.com>

The boot device is now checked inside a dedicated rule, that is only
called during BL2 compilation step

Change-Id: Ie7bcd1f166285224b0c042238989a82f7b6105c6
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/183646


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: CIBUILD <smet-aci-builds@lists.codex.cro.st.com>
Reviewed-by: Lionel DEBIEVE <lionel.debieve@st.com>

In case of programmer load, we must invalidate cache
used for the download buffer.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I372e3583e8964c70a71e2677a26dca74eb307bc2
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/183629


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: CIBUILD <smet-aci-builds@lists.codex.cro.st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>

When returning from STANDBY state, only checking the boot action status
is not enough. We also have to check the non-secure return address is
correct, and the saved context is OK in backup RAM.
This is required for STANDBY with DDR off, which can be used when a user
issues a shutdown.

Change-Id: I4b1d5159cd7a524eb893229ea9bcf628746de0ab
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/183406


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: CIBUILD <smet-aci-builds@lists.codex.cro.st.com>
Reviewed-by: Lionel DEBIEVE <lionel.debieve@st.com>

This function will be used in BL2, after a return from Standby, to check
the context is correctly saved in Backup RAM.

Change-Id: I16790cbc86d074968d9f0041ef871945dd9d0e67
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/183405


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: CIBUILD <smet-aci-builds@lists.codex.cro.st.com>
Reviewed-by: Lionel DEBIEVE <lionel.debieve@st.com>

Change call of:
stm32mp_clk_enable() / stm32mp_clk_disable() / stm32mp_clk_get_rate()
by
clk_enable() / clk_disable() / clk_get_rate()

Change-Id: I15d2ce57b9499211fa522a1b53eeee9cf584c111
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/182346


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>
Tested-by: Yann GAUTIER <yann.gautier@st.com>

Introduce a minimal clock framework.

Change-Id: I5119a2aeaf103ceaae7a60d9e423caf0c148d794
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/182345


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>
Tested-by: Yann GAUTIER <yann.gautier@st.com>

In case of monitor in DDR, BL2 exports the low power
functions using the context.
Adapt BL2 to embed the critical section and context
to share the corresponding information.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I198a50f3f15ab0e54d9e65e23da3d1c6fe3f8df5
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/182043


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>

In stm32mp1_syscfg_disable_io_compensation(), to disable the IO
compensation cell, we have to set the corresponding bit in
SYSCFG_CMPENCLRR register, instead of clearing the bit in SETR register.

Change-Id: I510a50451f8afb9e98c24e1ea84efbf73a39e6b4
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/182085


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>

Because we are using firmware configuration in FIP
container, we must embed the corresponding device tree.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I2deae522f43086f884594d4dd78b053d3c08615e
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/182041


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>

To avoid parsing device tree file too often, keep the RCC node offset
value in a variable in fdt_get_rcc_node().

Change-Id: Ibb23ff92247d57c65a23517b8f3473f639794d2a
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/181775


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>

vdd_usb must not be present unless vdda1v8 is present. So, as vdda1v8 is
disabled during standby, vdd_usb cannot be kept on during suspend.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Change-Id: I49d9683fd2ca7f89cf17cc3147585fc6b8916388

STM32MP_USE_STM32IMAGE is now used to distinguished the 2 possible
configurations.
If STM32MP_USE_STM32IMAGE is set, the legacy loading scheme is used. It
implies a single binary containing BL2, BL32 and a shared device tree
blob in case sp_min is used. The legacy loading scheme can also manage
the loading of OP-TEE.
If STM32MP_USE_STM32IMAGE is not set, then FIP is used, and it implies
FCONF as well.

Change-Id: Ibf93982e6be2f551d65094c985eaf5a6bd2ab788
Signed-off-by: Yann Gautier <yann.gautier@st.com>

Implement the plat_try_next_boot_source to load
backup partition on specific device.

Change-Id: Ica74596838b339e398c335f9e28ebf60795ab508
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/179616


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: Etienne CARRIERE <etienne.carriere@st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>

Add the secure device tree in the reserved memory region.
Use dtb_addr variable instead of hardcoded
value.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I2865186d96987d52c747e6b8b3459727afd5cf90
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/178516


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: Etienne CARRIERE <etienne.carriere@st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>

Add the corresponding firewall memory regions
into device tree.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: Ie39b0339f3c42b3dd756354138a872500c64f84c

Use now the device tree define bindings.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I4fa17e88357dca5174af8e6d1bb83e129092f10c

Add bindings that will be used to define DDR regions
and their access rights.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I745a7e580ef2b9e251d53db12c5a0a86dfe34463
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/178512


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>

Thanks to FIP and FCONF management, remove all static
management between OPTEE and SP_MIN monitor. All binaries
except the firmware config are defined as skip. They will be
added according to the firmware configuration parsing. The same
BL2 can be used with the FIP whatever the defined monitor.
Adapt also the load sequence for standby boot.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I94ea1d29e3f0604f2790853db397411b6d516108

Use a generic function for standby exit.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I7022fdaf82b0df04bb12b4a338d305a49e10bd8f

Remove access and check linked to backup register. RAM must
focus on DDR self refresh status based on the wake-up
state. Add a new export function to inform about the self
refresh state.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: Id2ef8c42ddcd5e24a9250ba07a048bd9b27d9dec
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/180503


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>

Add a new function to check if the boot is exiting from
a standby state. Remove unused CStandby state.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I3d5cc3c1629877ffe4ccaeb084e5818cf10a93d7

Based on FCONF framework, define DDR firewall regions
from firmware config file instead of static defines.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I471e15410ca286d9079a86e3dc3474f66d37b5ab

Add a new function that allows to enable or disabled filters on
configured regions dynamically. This will avoid to reconfigure
the entire attribute and just manage to enable/disable filters.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: If0937ca755bec6c45d3649718147108459682fff
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/178510


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>

Add the UUID into the io policies node that are retrieved
by BL2 using stm32mp_fconf_io.c populate function.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I595d5a41a1e0a27fcc02ea2ab5495d9dbf0e6773
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/178509


Reviewed-by: Yann GAUTIER <yann.gautier@st.com>
Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>

Introduce io policies management through the trusted
boot device tree for uuid references.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: Ibeeabede51b0514ebba26dbbdae587363b2aa0a7

Change-Id: I909b5bae9f827a7274ed4d0877f7befcf51162b6
Signed-off-by: Yann Gautier <yann.gautier@st.com>

Simplify the BL2 MMU mapping and reduce the memory regions
number. Split the XLAT define between BL2 and BL32 as binaries
do not share the same tables anymore.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: Iaf09e72b4cc29acbe376f6f1cd2a8116c793ba26

Avoid parsing device tree every time when returning
the DDR size.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I3dd1958f37d806f9c15a5d4151968935f6fe642e

Change-Id: I31ecbe922a32be5f370a52037160d8544bc82688
Signed-off-by: Yann Gautier <yann.gautier@st.com>

A new flag STM32MP_DDR_DUAL_AXI_PORT is added, and enabled by default.
It will allow choosing single or dual AXI ports for DDR.

Change-Id: I48826a66a6f4d18df87e081c0960af89ddda1b9d
Signed-off-by: Yann Gautier <yann.gautier@st.com>

Change-Id: Id2a4bc0895194b0c33bf7ea5d7cb435c46a74bea

Change-Id: I6486de200ddde5526fe64f4be8cb85fa3fe89431
Signed-off-by: Yann Gautier <yann.gautier@st.com>

Add regsiters defines and helpers to check if a virtual address is secured.

Change-Id: I14d36dee5cb3356ce41054de9157b58b47ac463f
Signed-off-by: Yann Gautier <yann.gautier@st.com>