- Feb 11, 2021
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Yann Gautier authored
To mask the time consumed waiting for CMPCR_READY bit, the function to enable IO compensation is split in 2, a start and a finish function. This is used at boot, and in return from STOP mode. Change-Id: Ic2b67c0e68415eb1abd3c7ba916b0fae21737235 Signed-off-by:
Yann Gautier <yann.gautier@st.com> Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/188608 Reviewed-by:
CITOOLS <MDG-smet-aci-reviews@list.st.com> Reviewed-by:
CIBUILD <MDG-smet-aci-builds@list.st.com>
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Yann Gautier authored
This function will return true if the platform has booted from UART or USB, false if it booted from a storage device. Change-Id: I427f87cb3005c337b878430d2d484fb43236d5ea Signed-off-by:
Yann Gautier <yann.gautier@st.com> Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/188655 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
Sebastien PASDELOUP <sebastien.pasdeloup-ext@st.com> Tested-by:
Sebastien PASDELOUP <sebastien.pasdeloup-ext@st.com>
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Yann Gautier authored
Those functions are not directly linked to context, used for low-power states. They are moved to stm32mp1_private.c file. Change-Id: Id4b164aa078077fcf90557bedc2f14c4969fe5da Signed-off-by:
Yann Gautier <yann.gautier@st.com> Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/188654 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Lionel DEBIEVE <lionel.debieve@st.com> Tested-by:
Lionel DEBIEVE <lionel.debieve@st.com>
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Lionel Debieve authored
This function can be used to dump core registers when an issue occurred. It will be automatically called in debug mode and print information. It uses a first core boolean to avoid unexpected dump information on a SGI1 irq request also used for a standard core hotplug. Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Change-Id: I264bc6e4206e502a46e41c0820938032535a2058 Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/186540 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com>
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Lionel Debieve authored
In case of monitor in DDR, BL2 exports the low power functions using the context. Adapt BL2 to embed the critical section and context to share the corresponding information. Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Change-Id: I198a50f3f15ab0e54d9e65e23da3d1c6fe3f8df5 Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/182043 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com>
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Yann Gautier authored
STM32MP_USE_STM32IMAGE is now used to distinguished the 2 possible configurations. If STM32MP_USE_STM32IMAGE is set, the legacy loading scheme is used. It implies a single binary containing BL2, BL32 and a shared device tree blob in case sp_min is used. The legacy loading scheme can also manage the loading of OP-TEE. If STM32MP_USE_STM32IMAGE is not set, then FIP is used, and it implies FCONF as well. Change-Id: Ibf93982e6be2f551d65094c985eaf5a6bd2ab788 Signed-off-by:
Yann Gautier <yann.gautier@st.com>
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- Feb 05, 2021
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Yann Gautier authored
Thanks to FIP and FCONF management, remove all static management between OPTEE and SP_MIN monitor. All binaries except the firmware config are defined as skip. They will be added according to the firmware configuration parsing. The same BL2 can be used with the FIP whatever the defined monitor. Adapt also the load sequence for standby boot. Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Change-Id: I94ea1d29e3f0604f2790853db397411b6d516108
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Lionel Debieve authored
Add a new function to check if the boot is exiting from a standby state. Remove unused CStandby state. Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Change-Id: I3d5cc3c1629877ffe4ccaeb084e5818cf10a93d7
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Lionel Debieve authored
Based on FCONF framework, define DDR firewall regions from firmware config file instead of static defines. Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Change-Id: I471e15410ca286d9079a86e3dc3474f66d37b5ab
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Yann Gautier authored
Change-Id: I31ecbe922a32be5f370a52037160d8544bc82688 Signed-off-by:
Yann Gautier <yann.gautier@st.com>
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- Jan 13, 2021
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Etienne Carriere authored
Change-Id: I0816efd1fa43e4982e0d6ccaf0051835abaebac5 Signed-off-by:
Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
Add new static functions to factorize code in stm32mp1_security.c. New functions are also created and exported to easily configure TZC400. Change-Id: Ifa5a1aaf7c56c25dba9a0ab8e985496d7cb06990 Signed-off-by:
Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
This function should be defined for all ST platforms. Change-Id: I9b636d3b5e19d31c9b960f5349e1f252cc74d764 Signed-off-by:
Yann Gautier <yann.gautier@st.com> Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/150064 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
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Yann Gautier authored
The GIC v2 initialization code could be shared to other ST platforms. The stm32mp1_gic.c file is then moved to common directory, and renamed stm32_gic.c. The functions are also aligned with the already defined function stm32_gic_enable_spi in common code, i.e. prefix is stm32_gic. Change-Id: I60820823b470217d3a95cc569f941c2cb923dfa9 Signed-off-by:
Yann Gautier <yann.gautier@st.com> Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/140376 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
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Yann Gautier authored
Change-Id: I8e0ba794e5ded1290fb83fe8d43ce54d4dc0e320 Signed-off-by:
Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
The security configuration of peripherals is retrieved from device tree file. Change-Id: Iccd846462913cae8784dd6d7d613eb22834936a3 Signed-off-by:
Yann Gautier <yann.gautier@st.com>
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- Nov 26, 2020
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Patrick Delaunay authored
Add a platform function to get address from UART instance. Change-Id: Iecf052d219788664843bf1f3120964c92d4d85de Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com> Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/180869 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com> Tested-by:
Yann GAUTIER <yann.gautier@st.com>
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Patrick Delaunay authored
Add a new function to get the current boot device. Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com> Change-Id: Icd900e9d737c64034df8c5db7f59970f54373934 Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/177378 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com> Tested-by:
Yann GAUTIER <yann.gautier@st.com>
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- Jul 16, 2020
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Etienne Carriere authored
This change implements platform services for stm32mp1 to expose clock and reset controllers over SCMI clock and reset domain protocols in sp_min firmware. Requests execution use a fastcall SMC context using a SiP function ID. The setup allows the create SCMI channels by assigning a specific SiP SMC function ID for each channel/agent identifier defined. In this change, stm32mp1 exposes a single channel and hence expects single agent at a time. The input payload in copied in secure memory before the message in passed through the SCMI server drivers. BL32/sp_min is invoked for a single SCMI message processing and always returns with a synchronous response message passed back to the caller agent. This change fixes and updates STM32_COMMON_SIP_NUM_CALLS that was previously wrongly set 4 whereas only 1 SiP SMC function ID was to be counted. STM32_COMMON_SIP_NUM_CALLS is now set to 3 since the 2 added SiP SMC function IDs for SCMI services. Change-Id: Icb428775856b9aec00538172aea4cf11e609b033 Signed-off-by:
Etienne Carriere <etienne.carriere@st.com>
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- Mar 26, 2020
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Yann Gautier authored
This function gets the DDR size from DT, and withdraws (if defined) the sizes of secure DDR and shared memory areas. This function also checks DT values fits the default DDR range. This non-secure memory is available for BL33 and non-secure OS. Change-Id: I162ae5e990a0f9b6b7d07e539de029f1d61a391b Signed-off-by:
Yann Gautier <yann.gautier@st.com>
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- Jun 17, 2019
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Yann Gautier authored
The system configuration controller is mainly used to manage the compensation cell and other IOs and system related settings. The SYSCFG driver is in charge of configuring masters on the interconnect, IO compensation, low voltage boards, or pull-ups for boot pins. All other configurations should be handled in Linux drivers requiring it. Device tree files are also updated to manage vdd-supply regulator. Change-Id: I10fb513761a7d1f2b7afedca9c723ad9d1bccf42 Signed-off-by:
Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by:
Yann Gautier <yann.gautier@st.com>
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- Feb 14, 2019
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Yann Gautier authored
Some parts of code could be shared with platform derivatives, or new platforms. A new folder plat/st/common is created to put common parts. stm32mp_common.h is a common API aggregate. Remove some casts where applicable. Fix some types where applicable. Remove also some platform includes that are already in stm32mp1_def.h. Change-Id: I46d763c8d9e15732d1ee7383207fd58206d7f583 Signed-off-by:
Yann Gautier <yann.gautier@st.com> Signed-off-by:
Etienne Carriere <etienne.carriere@st.com>
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- Jan 18, 2019
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Yann Gautier authored
Change fdt_check_status function to fdt_get_status. Update GPIO defines. Move some functions in gpio driver, instead of dt helper file. Add GPIO bank helper functions. Use only one status field in dt_node_info structure including both status and secure status. Change-Id: I34f93408dd4aac16ae722f564bc3f7d6ae978cf4 Signed-off-by:
Yann Gautier <yann.gautier@st.com> Signed-off-by:
Etienne Carriere <etienne.carriere@st.com> Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Signed-off-by:
Nicolas Le Bayon <nicolas.le.bayon@st.com>
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- Nov 08, 2018
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Antonio Nino Diaz authored
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards. The style that this project is now to use the full name of the file in capital letters followed by 'H'. For example, for a file called "uart_example.h", the header guard is UART_EXAMPLE_H. The exceptions are files that are imported from other projects: - CryptoCell driver - dt-bindings folders - zlib headers Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e Signed-off-by:
Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- Jul 24, 2018
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Yann Gautier authored
Signed-off-by:
Yann Gautier <yann.gautier@st.com> Signed-off-by:
Mathieu Belou <mathieu.belou@st.com> Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Signed-off-by:
Etienne Carriere <etienne.carriere@st.com> Signed-off-by:
Nicolas Le Bayon <nicolas.le.bayon@st.com>
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Yann Gautier authored
The DDR driver is under dual license, BSD and GPLv2. The configuration parameters are taken from device tree. Signed-off-by:
Yann Gautier <yann.gautier@st.com> Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by:
Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by:
Lionel Debieve <lionel.debieve@st.com>
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Yann Gautier authored
STM32MP1 is a microprocessor designed by STMicroelectronics, based on a dual Arm Cortex-A7. It is an Armv7-A platform, using dedicated code from TF-A. STM32MP1 uses BL2 compiled with BL2_AT_EL3. Signed-off-by:
Yann Gautier <yann.gautier@st.com> Signed-off-by:
Mathieu Belou <mathieu.belou@st.com> Signed-off-by:
Etienne Carriere <etienne.carriere@st.com> Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Signed-off-by:
Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by:
Pascal Paillet <p.paillet@st.com>
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