Add a new function to check if the boot is exiting from
a standby state. Remove unused CStandby state.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I3d5cc3c1629877ffe4ccaeb084e5818cf10a93d7

Based on FCONF framework, define DDR firewall regions
from firmware config file instead of static defines.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I471e15410ca286d9079a86e3dc3474f66d37b5ab

Change-Id: I31ecbe922a32be5f370a52037160d8544bc82688
Signed-off-by: Yann Gautier <yann.gautier@st.com>

Change-Id: Id2a4bc0895194b0c33bf7ea5d7cb435c46a74bea

Change-Id: I320dde13d0205190ee23f08d0c0318a07a336ab0

To have a more generic code, remove the Q from the *QSPI macros.

Change-Id: I2fa94b54054036c2175df3dfddcb76eec1119ad2
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/175824


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: Lionel DEBIEVE <lionel.debieve@st.com>

BL2 still uses the STM32 header binary format to be loaded from ROM code.
BL32 and BL33 and their respective device tree files are now put together
in a FIP file.
One DTB is created for each BL. To reduce their sizes, 2 new dtsi file are
in charge of removing useless nodes for a given BL. This is done because
BL2 and BL32 share the same device tree files base.

Change-Id: I1ffada0af58486d4cf6044511b51e56b52269817
Signed-off-by: Yann Gautier <yann.gautier@st.com>

Auto-stop SMC is called by stm32 cpu-idle kernel driver
in order to enter in Stop mode.

Signed-off-by: Pascal Paillet <p.paillet@st.com>
Change-Id: I9b29a7a3fa7f77a4854bfccc20d068552f9cc58f

STGEN should also be saved before entering in Stop mode,
because its clock may be gated.

Signed-off-by: Pascal Paillet <p.paillet@st.com>
Change-Id: I864c3241e4c4daaec7eb32a17a6a8b5d90f0e999

Enable TRUSTED_BOARD_BOOT. This change removes calls to
stm32mp_check_header() and stm32mp_auth_image() when boot images
are loaded since images are now verified from the authentication
framework.

Change-Id: Iec5b645e1581543c99ae59bdb4dd033c577f2295
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>

Change-Id: I0816efd1fa43e4982e0d6ccaf0051835abaebac5
Signed-off-by: Yann Gautier <yann.gautier@st.com>

Allow to configure the retram state in standby-ddr-sr from
the device-tree. This is realized by introducing a new binding
property to stm32mp1 pwr node: st,retram-enabled-in-standby-ddr-sr.

Signed-off-by: Pascal Paillet <p.paillet@st.com>
Change-Id: Iacd15321bce06e071a82bdfa05e4b63c3bf8c4fa

Change-Id: I32ed528a8eeca2ae61aa0406e4c4578df61190ab
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/175775


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>

Add new static functions to factorize code in stm32mp1_security.c.
New functions are also created and exported to easily configure TZC400.

Change-Id: Ifa5a1aaf7c56c25dba9a0ab8e985496d7cb06990
Signed-off-by: Yann Gautier <yann.gautier@st.com>

When RCC[TZEN] is enabled secure world needs to save the secure and
non-secure clock configuration settings and restore them when
resuming.

Function stm32mp1_clk_mpu_suspend()/stm32mp1_clk_mpu_resume() are
made local and renamed clk_mpu_suspend()/clk_mpu_resume(). The
overall clock configuration is saved with stm32mp1_clock_suspend()
and restored with stm32mp1_clock_resume().

Change-Id: I1fc0c693c59ffe972961c2b23f30a39a520f3aaa
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

When TF-A BL2 boots an OP-TEE, the OP-TEE may be a old version that
provides a V1 PM context. In such case, precomputed PLL1 settings
are not available in the wakeup context and shall be recomputed.

With this stm32_get_pll1_settings_from_context() has a return value
that states if the PLL1 settings were restored.

Change-Id: Ia561e4ee42a788bc14a05e583650c5eb050131fd
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/153628


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: CIBUILD <smet-aci-builds@lists.codex.cro.st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>

Add a new BSEC service to force an OTP to be permanently write-locked
and not programmable.
Note that the corresponding status register is readable from non secure
world.

Change-Id: Ic927db855f4193bb3083fa409b7be34818a21f34
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

When coming back from standby, the backup value must be
restored with the sleep time.
Rework the function to add a backup counter value to be
added to the sleep time and move stgen functions to
stm32mp generic code.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I978a591a3a344561758117742b0dcdd862e1a6f0

This function should be defined for all ST platforms.

Change-Id: I9b636d3b5e19d31c9b960f5349e1f252cc74d764
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/150064


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>

A new RCC_OPP function ID has been added to the SMC list.
STM32_SMC_RCC_OPP_SET and STM32_SMC_RCC_OPP_ROUND operate on
OPP table with the DT reference, and eventually act on RCC IP.

Change-Id: I07c8f4cbf3c359759032d6e45c342cc4cbdb54bd
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

All OPP PLL1 settings are computed during cold boot and saved in RAM.
During standby mode transitions, they are saved in the context and
restored when coming back to normal mode.
stm32_get_pll1_settings_from_context() is added to get easily them in BL2.
stm32_are_pll1_settings_valid_in_context() is used in BL32 and determines
if settings are already computed or not.

Change-Id: I8bfe925be4e9a0dd2cce8bf5486f54584d1d1716
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

The GIC v2 initialization code could be shared to other ST platforms.
The stm32mp1_gic.c file is then moved to common directory, and renamed
stm32_gic.c.
The functions are also aligned with the already defined function
stm32_gic_enable_spi in common code, i.e. prefix is stm32_gic.

Change-Id: I60820823b470217d3a95cc569f941c2cb923dfa9
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/140376


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>

Change-Id: I96b4ec514e316f85313104e77fde7aeab7dafab4
Signed-off-by: Yann Gautier <yann.gautier@st.com>

Change-Id: I3511c88d174c7404da20910526427d096fce9241
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>

In case of dynamic drivers, we need to register dynamically
the requested gic SPI interrupt. This function allows to
enable all SPI from DT or just one by name.

Change-Id: Ic5119ecd462e415561d28f9cc40e81419b716e58
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

Change-Id: I8e0ba794e5ded1290fb83fe8d43ce54d4dc0e320
Signed-off-by: Yann Gautier <yann.gautier@st.com>

The security configuration of peripherals is retrieved from device tree
file.

Change-Id: Iccd846462913cae8784dd6d7d613eb22834936a3
Signed-off-by: Yann Gautier <yann.gautier@st.com>

Add function stm32_get_boot_interface to get the current boot interface
from information saved in the TAMP register.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: I6e99fe172d895fd9d8dcb8d827b949d0e89b7879
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/180870


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>
Tested-by: Yann GAUTIER <yann.gautier@st.com>

Add a platform function to get address from UART instance.

Change-Id: Iecf052d219788664843bf1f3120964c92d4d85de
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/180869


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>
Tested-by: Yann GAUTIER <yann.gautier@st.com>

Add a new function to get the current boot device.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: Icd900e9d737c64034df8c5db7f59970f54373934
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/177378


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>
Tested-by: Yann GAUTIER <yann.gautier@st.com>

Add a file to support the tool STM32CubeProgrammer over USB
in BL2 for stm32mp15x platform

Change-Id: I48a8f772cb0e9b8be24c06847f724f0470c0f917
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/177374


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>
Tested-by: Yann GAUTIER <yann.gautier@st.com>

Add ROM code identifier used in boot context to identify serial boot on
UART or on USB

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: I969037af2b697f18ed9b794d2e6561e4c4ff05e8
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/177363


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>
Tested-by: Yann GAUTIER <yann.gautier@st.com>

This change implements platform services for stm32mp1 to expose clock
and reset controllers over SCMI clock and reset domain protocols
in sp_min firmware.

Requests execution use a fastcall SMC context using a SiP function ID.
The setup allows the create SCMI channels by assigning a specific
SiP SMC function ID for each channel/agent identifier defined. In this
change, stm32mp1 exposes a single channel and hence expects single
agent at a time.

The input payload in copied in secure memory before the message
in passed through the SCMI server drivers. BL32/sp_min is invoked
for a single SCMI message processing and always returns with a
synchronous response message passed back to the caller agent.

This change fixes and updates STM32_COMMON_SIP_NUM_CALLS that was
previously wrongly set 4 whereas only 1 SiP SMC function ID was to
be counted. STM32_COMMON_SIP_NUM_CALLS is now set to 3 since the
2 added SiP SMC function IDs for SCMI services.

Change-Id: Icb428775856b9aec00538172aea4cf11e609b033
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

Define enum stm32mp_shres for platform stm32mp1. The enumerated
type defines all resources that can be assigned to secure or
non-secure worlds at run time for the platform.

Change-Id: I5de20d72735856645f1efd0993643278e8d35bcb
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

This function gets the DDR size from DT, and withdraws (if defined) the
sizes of secure DDR and shared memory areas.
This function also checks DT values fits the default DDR range.
This non-secure memory is available for BL33 and non-secure OS.

Change-Id: I162ae5e990a0f9b6b7d07e539de029f1d61a391b
Signed-off-by: Yann Gautier <yann.gautier@st.com>

This flag warns if anything is declared more than once in the same
scope, even in cases where multiple declaration is valid and changes
nothing.

Consequently, this patch also fixes the issues reported by this
flag. Consider the following two lines of code from two different source
files(bl_common.h and bl31_plat_setup.c):

IMPORT_SYM(uintptr_t, __RO_START__, BL_CODE_BASE);
IMPORT_SYM(unsigned long, __RO_START__, BL2_RO_BASE);

The IMPORT_SYM macro which actually imports a linker symbol as a C expression.
The macro defines the __RO_START__ as an extern variable twice, one for each
instance. __RO_START__ symbol is defined by the linker script to mark the start
of the Read-Only area of the memory map.

Essentially, the platform code redefines the linker symbol with a different
(relevant) name rather than using the standard symbol. A simple solution to
fix this issue in the platform code for redundant declarations warning is
to remove the second IMPORT_SYM and replace it with following assignment

static const unsigned long BL2_RO_BASE = BL_CODE_BASE;

Change-Id: If4835d1ee462d52b75e5afd2a59b64828707c5aa
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

PLATFORM_CORE_COUNT - Unsigned int
PLATFORM_CLUSTER_COUNT - Unsigned int
PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int
PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int

Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com>
Change-Id: I3421336230981d4cda301fa2cef24b94b08353b1

STM32MP1 platform is able to boot from SPI-NOR devices.
These modifications add this support using the new
SPI-NOR framework.

Change-Id: I75ff9eba4661f9fb87ce24ced2bacbf8558ebe44
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>

STM32MP1 platform is able to boot from SPI-NAND devices.
These modifications add this support using the new
SPI-NAND framework.

Change-Id: I0d5448bdc4bde153c1209e8043846c0f935ae5ba
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>

STM32MP1 platform is able to boot from raw NAND devices.
These modifications add this support using the new
raw NAND framework.

Change-Id: I9e9c2b03930f98a5ac23f2b6b41945bef43e5043
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>