PLL1 settings are now computed from OPP table frequencies.

Change-Id: Icc8ab3975cb5e1ef4ab14796868735d39d2e5d65
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

On cold boot, compute and save all OPP PLL1 settings in SRAM.
Before that, read VDDCORE regulator voltage (only if PMIC is present),
it can allow to retrieve current value in registers instead of computing
them, in order to increase boot time performances.

Change-Id: Idfad7b3a06b3eed62dfc61fa87f224fd440e506c
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

If no pre-defined PLL1 settings in DT, or in case of standby wake up
(restore previously PLL1 settings from context in this case),
find the highest CPU frequency in the OPP table (in DT, compatible with
platform capabilities, or in structure restored in RAM), and set related
VDDCORE voltage (only if PMIC is present).
Then clock tree initialization can then be processed.

Change-Id: I15e50cc39ce784d29229e54bef79684fb2f4766c
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

All OPP PLL1 settings are computed during cold boot and saved in RAM.
During standby mode transitions, they are saved in the context and
restored when coming back to normal mode.
stm32_get_pll1_settings_from_context() is added to get easily them in BL2.
stm32_are_pll1_settings_valid_in_context() is used in BL32 and determines
if settings are already computed or not.

Change-Id: I8bfe925be4e9a0dd2cce8bf5486f54584d1d1716
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

Create a static structure containing, for each CPU operating point, the
corresponding VDDCORE voltage and all PLL1 settings.
All OPP PLL1 settings are computed during cold boot and saved in RAM.
stm32mp1_clk_lp_save/load_opp_pll1_settings() functions allow to manage
these settings in the context during the standby mode transitions.

clk_compute_pll1_settings() uses a simplified but optimized algorithm,
to compute PLL1 configuration and fractional values from the PLL12
input frequency, given by the Device Tree, and the expected CPU frequency.
clk_get_pll1_settings() just gets the input frequency before calling
the algorithm. If they have already been computed, structure is parsed.

A stm32mp1_clk_compute_all_pll1_settings() service gets frequency and
voltage information from OPP table, and fills PLL1 settings structure,
either by retrieving parameters in RCC registers (case of the current
values, managed by clk_save_current_pll1_settings() function), or by
computing them.

stm32mp1_clk_init() calls clk_get_pll1_settings() when a non-null CPU
expected frequency value is entered as new entry parameter, and when PLL1
settings are not hardly-defined in the Device Tree.

stm32mp1_clk_get_maxfreq_opp() parse OPP table in RAM to get OPP
coordinates (frequency value and VDDCORE voltage) corresponding to the
highest frequency couple.

Change-Id: I4dd84c56a1d834858621ec1ba9c1f35cfa0a59de
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

Store each PLL node validity information,
this avoids parsing DT several times.

Change-Id: I17f4dae23fb44ac60bd0ad9ce989ce1c680ab505
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

fdt_is_pll1_predefined() checks if PLL1 hard-coded settings
have been defined in DT.
It will determine if they have to be computed by the software.
This support aims at backward compatibility of the DT used in
stm32mp1 TF-A.

Change-Id: Ied5df27fab0ca32d93917f1d92f3f71988afb93d
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

Two new functions parse OPP table in device tree to get OPP parameters
(frequency value and VDDCORE voltage).
Compliance is checked with platform OPP HW support capabilities.

dt_get_all_opp_freqvolt() returns all couples of values.
dt_get_max_opp_freqvolt() returns only the highest frequency couple.

Change-Id: I9b743eac548de635fb0eed45c50271856b5df771
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

Information is extracted from part number, and it will be then used to
filter OPP table.

Change-Id: I52737ae3d941bdff9200dd9ddeb3641dd399210d
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

Saved timing and frequency values are related to a specific I2C instance,
they should be part of the handle structure.

Change-Id: Ib05dde7668201999c0b46bc5297cd5a2be307143
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

pmic_config_boot_on() now acts on regulators tagged "boot-on"
and "always-on" in device tree in all cases, to obtain a similar
behavior in standby wake up and in cold boot.

Change-Id: I715f1c5370e72c7c2d2c51acad62a43f61e7823d
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

Prepare new clock tree initialization scheme, by splitting PMIC
initialization in three phases.

initialize_pmic() configures the PMIC I2C link, and registers the PMIC
resource. It is called twice in BL2 stage: before clock tree
initialization to check VDDCORE voltage and update it if necessary, and
after to re-sync I2C link with new clock update. It is also used in BL32
stage.

configure_pmic() sets the boot_on configuration for all regulators. It is
used in BL2 only. Then, before PLLs and clock tree init, VDDCORE regulator
voltage update is possible if requested by the device tree configuration.

print_pmic_info_and_debug() prints the PMIC version ID and displays
regulator information if debug is enabled.

Change-Id: Ib81a625740b7ec6abb49cfca05e44c69efaa4718
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

Store status of dt_pmic_status() as local static variable,
this avoids parsing DT several times.
In the same way, store nodes in dt_pmic_i2c_config() and
in dt_get_pmic_node() as local static variables.

Change-Id: I4585e9dfdde2847a369bffcc6f2b39ecc2b74de1
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

"cfg" property is mandatory, an error is generated if not found.
"frac" is optional, default value is returned if not found.
"csg" is optional too, a boolean value indicates if it has been found,
and its value is updated.

Change-Id: I039466fbe1e67d160f7112814e7bb63b661804d0
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

Use a timeout during IO compensation enable function, when
waiting for ready status. If timeout expires, print a warning
message, to indicate that the SoC recommendation is not followed.

Change-Id: I98c7dcb1364b832f4f4b5fc9a0b85a3741a8af4b
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

In case of non secure node, the interrupt will be secured.
The name property must take care of the status.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I72d64ffa4ae99e9a41b05aba152ac9d39d618c69

Fix the following DT dtc warnings for stm32mp1 boards:

Warning (unit_address_vs_reg): /soc/rcc@50000000/st,pll@0:
 node has a unit name, but no reg property
Warning (unit_address_vs_reg): /soc/rcc@50000000/st,pll@1:
 node has a unit name, but no reg property
Warning (unit_address_vs_reg): /soc/rcc@50000000/st,pll@2:
 node has a unit name, but no reg property
Warning (unit_address_vs_reg): /soc/rcc@50000000/st,pll@3:
 node has a unit name, but no reg property

Update device tree bindings documentation.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: I91be408ea1d9b0474caf4965175df33792b7e11e

Fixes implementation against build warning reported by GCC:

drivers/st/io/io_stm32image.c: In function ‘stm32image_partition_read’:
drivers/st/io/io_stm32image.c:249:6: error: ‘result’ may be used uninitialized in this function [-Werror=maybe-uninitialized]
  int result;
      ^~~~~~

Actually, by construction the current implementation of function
stm32image_partition_read() does not mandate result to be initialized
since it always reaches the exit point with a valid value in 'result'.
Yet, this change prevents compiler from complaining and is more robust
against future changes in the implementation.

Change-Id: I383575edb605b7535398952a5fdfc266c0068c71
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

Add panic when the boot interface is not supported to stop BL2 execution.

print_boot_device() already raise panic for unknown boot interface.
So this case only occurs when known boot interface is not supported,
removed by compilation flag.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: Ib57017183b31d8d79d9f180d76d592291cad1fe5

Fixing boot issue due to limited size for device tree.
Adjust to 24KB.

Change-Id: Idb82024a1fcd73736c33405d7d04131869d70698
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>

Add the header version major and minor.

Change-Id: Ia5db16556f08629dbdea4523201872dc222758fb
Signed-off-by: Yann Gautier <yann.gautier@st.com>

An STM32 image with the awaited header major version shouldn't be forbid
to boot. If the minor differs, then it means only non-mandatory options
have been added in the reserved fields, and the header remains backward
compatible.

Change-Id: Iff16b67f95c728e2f1d128bd1760a4be497c5ca3
Signed-off-by: Yann Gautier <yann.gautier@st.com>

Do not limit to 3 (100KHz, 400KHz, 1MHz) bus frequencies, but instead
allow for any frequency up to 1MHz. Depending on the requested frequency
(via the clock-frequency DT entry), use the spec data from either
Standard, Fast or Fast Plus mode.

Change-Id: I23fea20465742e15f79f4c501e544cfc62611675
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/143784


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: CIBUILD <smet-aci-builds@lists.codex.cro.st.com>
Reviewed-by: Lionel DEBIEVE <lionel.debieve@st.com>

The function stm32_i2c_get_setup_from_fdt() was using fdt_getprop() to
to get some i2c node properties, and set a default value if the node was
not found. The function fdt_read_uint32_default() already does this in
a simpler way. The void *fdt parameter is then useless.

Change-Id: I74c6295bb5765ee7c7e0a9ae020b741f1fe022a6
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/143783


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: CIBUILD <smet-aci-builds@lists.codex.cro.st.com>
Reviewed-by: Lionel DEBIEVE <lionel.debieve@st.com>

Align STPMIC1 configuration with linux.

Signed-off-by: Pascal Paillet <p.paillet@st.com>
Change-Id: I4efaa889fec4337ab2516daf17452f63f874a757
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/144883


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: CIBUILD <smet-aci-builds@lists.codex.cro.st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>

No more used, "st,non-secure-otp" property replaces them.

Change-Id: Iacf3b547951e17503ba826b537c7deaf8a53dcd4
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

Improve use and readability.

Change-Id: Ia99fc38287f36c9dd12bfe51352afa5da68c0e47
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/142979


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: CIBUILD <smet-aci-builds@lists.codex.cro.st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>

Factorize DT information handling in a single static function.
This source code was reused several times, it renders it common.

In modified functions, align return code to avoid mixing between
ERRNO and FDT families.
Remove also dt_ prefix from functions if they do not only deal
with Device Tree, in that case ERRNO code is used.

Change-Id: I214acb1f8d50388636df9cb0cae64a6536e2376f
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

Replace hard-coded values by read result of the Device Tree,
thanks to a new local dedicated service.

Change-Id: I1c0f2334e8b035562ccd6fd349bb7cf3f5a2ae09
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/141912


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: CIBUILD <smet-aci-builds@lists.codex.cro.st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>

dt_match_instance_by_compatible() gives the DT node offset in DT that
matches both compatible and the peripheral instance address.

Change-Id: Ia85f4f4aa8fe8efd4df310d765e7586e67aa34c2
Signed-off-by: Yann Gautier <yann.gautier@st.com>

Avoid mixing dash and underscore.

Change-Id: I7f8b6c5397d789c3cb2fdbae50205610c5595af7
Signed-off-by: Yann Gautier <yann.gautier@st.com>

Further information such as boot instance are sent over backup
registers. In order to guarantee direct access to backup registers
in uboot, we will keep the RTC clock enabled.

Change-Id: I16572d422bfebbf39190a87db8046df486ce91c8
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

Originally required for CubeMX.
Still the case?

Change-Id: Icab89afbdb4852821062fa00ffadc07aba39aea9

The GIC v2 initialization code could be shared to other ST platforms.
The stm32mp1_gic.c file is then moved to common directory, and renamed
stm32_gic.c.
The functions are also aligned with the already defined function
stm32_gic_enable_spi in common code, i.e. prefix is stm32_gic.

Change-Id: I60820823b470217d3a95cc569f941c2cb923dfa9
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/140376


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>

The wakeup from STOP mode should be available even if TZEN bit is 0 in RCC.

Change-Id: I4301ebf76d4a48972bfc2c3d14945a7c18249b51
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/138474


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: CIBUILD <smet-aci-builds@lists.codex.cro.st.com>
Reviewed-by: Lionel DEBIEVE <lionel.debieve@st.com>
Tested-by: Lionel DEBIEVE <lionel.debieve@st.com>

In case of flasher mode, the bootrom manage to auto-detect
HSE clock configuration. In order to detect a bad device tree
setting in bl2, it will crash during flash if the configuration
is not aligned with the auto-detection.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I230697695745d6282d14b1ebfa6e4c4caa0cd8e2
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/137739


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: CIBUILD <smet-aci-builds@lists.codex.cro.st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>

If the I2C timing has already been calculated, and if the frequency is
the same, we can re-use the saved timing, instead of recompute it.

Change-Id: Ic892af224cd8ce64daf762c14b737334f73124cf
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/137754


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: CIBUILD <smet-aci-builds@lists.codex.cro.st.com>
Reviewed-by: Nicolas LE BAYON <nicolas.le.bayon@st.com>
Reviewed-by: Lionel DEBIEVE <lionel.debieve@st.com>

Adding a detection of timer precision to avoid wrong calculation. In
case of timer issue, calibration stops on the corresponding
clock.

Change-Id: I4e5bde8f5ca1366eb9278beec1da62bdfb4c5e67
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/136467


Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: CIBUILD <smet-aci-builds@lists.codex.cro.st.com>
Reviewed-by: Yann GAUTIER <yann.gautier@st.com>

Just for debug

Change-Id: If715297ca97f521132a18559ac383d8004b6f994

Change-Id: I1b8a938a454b0561b4898a3124109c682228ebd3
Signed-off-by: Yann Gautier <yann.gautier@st.com>