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Commit 0fa400cb authored by Vineet Gupta's avatar Vineet Gupta
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ARC: [plat-axs103] refactor the DT fudging code


with clk frequency setting code gone by prev commits, we can elide the
unconditonal DT parsing to the specific case of quad core config where
we possibly need to fudge the DT value.

Signed-off-by: default avatarVineet Gupta <vgupta@synopsys.com>
parent f6a09bac
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